Stephan Diestelhorst | 65cea47 | 2014-06-30 13:56:06 -0400 | [diff] [blame] | 1 | # Copyright (c) 2013-2014 ARM Limited |
Akash Bagdia | 7d7ab73 | 2013-06-27 05:49:49 -0400 | [diff] [blame] | 2 | # All rights reserved. |
| 3 | # |
| 4 | # The license below extends only to copyright in the software and shall |
| 5 | # not be construed as granting a license to any other intellectual |
| 6 | # property including but not limited to intellectual property relating |
| 7 | # to a hardware implementation of the functionality of the software |
| 8 | # licensed hereunder. You may use the software subject to the license |
| 9 | # terms below provided that you ensure that this notice is replicated |
| 10 | # unmodified and in its entirety in all distributions of the software, |
| 11 | # modified or unmodified, in source code or in binary form. |
| 12 | # |
| 13 | # Redistribution and use in source and binary forms, with or without |
| 14 | # modification, are permitted provided that the following conditions are |
| 15 | # met: redistributions of source code must retain the above copyright |
| 16 | # notice, this list of conditions and the following disclaimer; |
| 17 | # redistributions in binary form must reproduce the above copyright |
| 18 | # notice, this list of conditions and the following disclaimer in the |
| 19 | # documentation and/or other materials provided with the distribution; |
| 20 | # neither the name of the copyright holders nor the names of its |
| 21 | # contributors may be used to endorse or promote products derived from |
| 22 | # this software without specific prior written permission. |
| 23 | # |
| 24 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 25 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 26 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 27 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 28 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 29 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 30 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 31 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 32 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 33 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 34 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Akash Bagdia | 7d7ab73 | 2013-06-27 05:49:49 -0400 | [diff] [blame] | 35 | |
| 36 | from m5.params import * |
| 37 | from m5.SimObject import SimObject |
Akash Bagdia | e7e17f9 | 2013-08-19 03:52:28 -0400 | [diff] [blame] | 38 | from m5.proxy import * |
Akash Bagdia | 7d7ab73 | 2013-06-27 05:49:49 -0400 | [diff] [blame] | 39 | |
| 40 | # Abstract clock domain |
| 41 | class ClockDomain(SimObject): |
| 42 | type = 'ClockDomain' |
| 43 | cxx_header = "sim/clock_domain.hh" |
Daniel R. Carvalho | 974a47d | 2021-05-09 12:32:07 -0300 | [diff] [blame] | 44 | cxx_class = 'gem5::ClockDomain' |
Akash Bagdia | 7d7ab73 | 2013-06-27 05:49:49 -0400 | [diff] [blame] | 45 | abstract = True |
| 46 | |
Stephan Diestelhorst | 65cea47 | 2014-06-30 13:56:06 -0400 | [diff] [blame] | 47 | # Source clock domain with an actual clock, and a list of voltage and frequency |
| 48 | # op points |
Akash Bagdia | 7d7ab73 | 2013-06-27 05:49:49 -0400 | [diff] [blame] | 49 | class SrcClockDomain(ClockDomain): |
| 50 | type = 'SrcClockDomain' |
| 51 | cxx_header = "sim/clock_domain.hh" |
Daniel R. Carvalho | 974a47d | 2021-05-09 12:32:07 -0300 | [diff] [blame] | 52 | cxx_class = 'gem5::SrcClockDomain' |
Stephan Diestelhorst | 65cea47 | 2014-06-30 13:56:06 -0400 | [diff] [blame] | 53 | |
| 54 | # Single clock frequency value, or list of frequencies for DVFS |
| 55 | # Frequencies must be ordered in descending order |
| 56 | # Note: Matching voltages should be defined in the voltage domain |
| 57 | clock = VectorParam.Clock("Clock period") |
Akash Bagdia | 7d7ab73 | 2013-06-27 05:49:49 -0400 | [diff] [blame] | 58 | |
Akash Bagdia | e7e17f9 | 2013-08-19 03:52:28 -0400 | [diff] [blame] | 59 | # A source clock must be associated with a voltage domain |
| 60 | voltage_domain = Param.VoltageDomain("Voltage domain") |
| 61 | |
Stephan Diestelhorst | 65cea47 | 2014-06-30 13:56:06 -0400 | [diff] [blame] | 62 | # Domain ID is an identifier for the DVFS domain as understood by the |
| 63 | # necessary control logic (either software or hardware). For example, in |
| 64 | # case of software control via cpufreq framework the IDs should correspond |
| 65 | # to the neccessary identifier in the device tree blob which is interpretted |
| 66 | # by the device driver to communicate to the domain controller in hardware. |
| 67 | domain_id = Param.Int32(-1, "domain id") |
| 68 | |
| 69 | # Initial performance level from the list of available operation points |
| 70 | # Defaults to maximum performance |
| 71 | init_perf_level = Param.UInt32(0, "Initial performance level") |
| 72 | |
Akash Bagdia | 7d7ab73 | 2013-06-27 05:49:49 -0400 | [diff] [blame] | 73 | # Derived clock domain with a parent clock domain and a frequency |
| 74 | # divider |
| 75 | class DerivedClockDomain(ClockDomain): |
| 76 | type = 'DerivedClockDomain' |
| 77 | cxx_header = "sim/clock_domain.hh" |
Daniel R. Carvalho | 974a47d | 2021-05-09 12:32:07 -0300 | [diff] [blame] | 78 | cxx_class = 'gem5::DerivedClockDomain' |
| 79 | |
Akash Bagdia | 7d7ab73 | 2013-06-27 05:49:49 -0400 | [diff] [blame] | 80 | clk_domain = Param.ClockDomain("Parent clock domain") |
| 81 | clk_divider = Param.Unsigned(1, "Frequency divider") |