- 41816bf stdlib: Added stdlib LoopPoint classes by Zhantong Qiu · 1 year, 5 months ago
- 0d129a6 sim: Added PcCountTracker and PcCountTrackerManager by Zhantong Qiu · 1 year, 5 months ago
- 717d3b2 base,python: Added PcCountPair type and parameter by Zhantong Qiu · 1 year, 5 months ago
- e160195 stdlib: Implement Simpoint Resources by Bobby R. Bruce · 1 year, 4 months ago
- cc838d7 stdlib: Update resources to have downloads optional by Bobby R. Bruce · 1 year, 4 months ago
- a9b69ee stdlib: Add null/None versioning in resources.json by Bobby R. Bruce · 1 year, 4 months ago
- 4ee724e stdlib: Specialize the gem5-resources by Bobby R. Bruce · 1 year, 5 months ago
- 3892ee0 configs: Deprecate fs.py and se.py scripts by Bobby R. Bruce · 1 year, 3 months ago
- c995d96 arch-arm: Add missing <array> header in regs/misc.hh by Ivan Turasov · 1 year, 3 months ago
- 4dfc312 base: extensible: add example codes of extension by Yan Lee · 1 year, 4 months ago
- 4c92537 mem: add extension mechanism into Request by Yan Lee · 1 year, 4 months ago
- c913c09 mem: add extension mechanism into Packet by Yan Lee · 1 year, 4 months ago
- df0bed6 python: Ensure that m5.internal.params is available by Nikos Nikoleris · 1 year, 4 months ago
- 109c327 base: add extensible type by Yan Lee · 1 year, 4 months ago
- f028bd5 arch-vega: Update API for some flat atomics by Matthew Poremba · 1 year, 4 months ago
- 3b4f241 arch-riscv: Fix incorrect trap value of instruction fault by Roger Chang · 1 year, 5 months ago
- 4b1c245 arch-riscv: Fix the behavior of write to status CSR by Roger Chang · 1 year, 4 months ago
- e10be09 dev: add method to set initial register value out of constructor. by hungweihsu · 1 year, 4 months ago
- ea9239a dev-amdgpu: Update deprecated ports by Matthew Poremba · 1 year, 4 months ago
- bb8f370 arch-vega: Implementing global_atomic_smax by Alexandru Dutu · 1 year, 8 months ago
- 8375058 arch-vega: Implementing global_atomic_smin by Alexandru Dutu · 1 year, 8 months ago
- d7516a2 arch-vega: Implementing global_atomic_or by Alexandru Dutu · 1 year, 8 months ago
- 39b5b5e dev-amdgpu: Fix address in POLL_REGMEM SDMA packet by Matthew Poremba · 1 year, 4 months ago
- b6a591e mem-dram: Make sure SHOW_SIM_OUTPUT is in global namespace. by Zhengrong Wang · 1 year, 4 months ago
- 39e8133 ext: Fix typo in DRAMSIM2 Sconscript by Zhengrong Wang · 1 year, 4 months ago
- bc9e90d arch-vega: Make VGPR-offset for global SGPR-base signed by Matthew Poremba · 1 year, 5 months ago
- 905b8eb arch-vega: Implement ds_write_b8_d16_hi by Matthew Poremba · 1 year, 5 months ago
- 89c49d1 arch-riscv: Fix the CSR instruction behavior. by zhongchengyong · 1 year, 4 months ago
- bd9e126 cpu: Add a generic model_reset port on the BaseCPU. by Gabe Black · 1 year, 4 months ago
- d1f7674 dev: Add a definition for VectorResetResponsePort. by Gabe Black · 1 year, 4 months ago
- aee282b tests: Update testing documentation by Melissa Jost · 1 year, 7 months ago
- e44cbe7 sim: handle async events in main thread only by Earl Ou · 1 year, 4 months ago
- 7371e46 mem: use default backdoor behavior for thread_bridge by Earl Ou · 1 year, 4 months ago
- 8a774e0 dev-amdgpu: Patch forgotten port after mem port owner deprecation by Gabriel Busnot · 1 year, 4 months ago
- a513e06 fastmodel: Export the reset signals of the GIC. by Gabe Black · 1 year, 4 months ago
- 59e16b5 fastmodel: forward stream ID to gem5 by Wei-Han Chen · 1 year, 4 months ago
- a2d321d fastmodel: change the constructor of bridges by Wei-Han Chen · 1 year, 5 months ago
- c9719b4 arch-riscv: Implement the resetThread method on the ISA object. by Gabe Black · 1 year, 4 months ago
- c853187 arch: Add a virtual method to the BaseISA to reset its ThreadContext. by Gabe Black · 1 year, 4 months ago
- de3dba9 arch-riscv: Get rid of redundant reset fault invocation. by Gabe Black · 1 year, 4 months ago
- d7cb6ac base: Turn all logging.hh macros into expression kind by Gabriel Busnot · 1 year, 4 months ago
- cd2f8b3 base: Enable non-copiable types in gem5_assert message formatting by Gabriel Busnot · 1 year, 4 months ago
- a0f6f85 sim: Suppress deleted operator= warn in Sys::Threads::const_it by Gabriel Busnot · 1 year, 4 months ago
- 7f4c92c mem,arch-arm,mem-ruby,cpu: Remove use of deprecated base port owner by Gabriel Busnot · 1 year, 5 months ago
- d40ed0f mem: Deprecate RequestPort and ResponsePort owner ref member by Gabriel Busnot · 1 year, 4 months ago
- c1b1a70 tests: Make the GTestException type accessible to unit tests by Gabriel Busnot · 1 year, 4 months ago
- 3bdbe48 base: Strengthen safe_cast and make it work for reference types by Gabriel Busnot · 1 year, 4 months ago
- 1b949e9 dev: terminal: run pollevent in terminal eventq by Earl Ou · 1 year, 4 months ago
- f256215 arch-riscv,sim-se: Support RV32 register ABI call by Roger Chang · 1 year, 7 months ago
- e4be93b sim: Add some helpers for setting up Signal*Ports in python. by Gabe Black · 1 year, 4 months ago
- 13dca0e scons: Link tcmalloc_minimal by default instead of tcmalloc by Gabriel Busnot · 1 year, 5 months ago
- a33b493 mem-cache: schedule already ready pf next cycle by Nathanael Premillieu · 1 year, 4 months ago
- d48e53e scons: force libasan to static linking by Johnny · 1 year, 5 months ago
- 534d9de scons: Raise bin size limit for sanitized builds. by Gabriel Busnot · 1 year, 4 months ago
- 8d0fde1 python: Fix deprecated decorator by Gabriel Busnot · 1 year, 4 months ago
- 8110a42 arch-arm: Replace Loader with loader namespace in SME code by Giacomo Travaglini · 1 year, 5 months ago
- 5a1414d arch: Remove a couple of deprecated namespaces by Daniel R. Carvalho · 1 year, 5 months ago
- 0bce2e5 dev: Ignore MC146818 UIP bit / Fix x86 Linux 5.11+ boot by Matthew Poremba · 1 year, 6 months ago
- b860e20 system-arm: Enable SME in the bootloader by Sascha Bischoff · 1 year, 10 months ago
- c694d85 arch-arm, cpu: Implement instructions added by FEAT_SME by Sascha Bischoff · 1 year, 10 months ago
- fe8eda9 arch, arch-arm, cpu: Add matrix reg support to the ISA Parser by Sascha Bischoff · 1 year, 10 months ago
- 142d562 arch-arm: Implement SME access traps and extend the SVE ones by Sascha Bischoff · 1 year, 10 months ago
- 72e4f61 arch-arm: Add interfaces to set and get SME vector length by Sascha Bischoff · 1 year, 10 months ago
- dfd151d arch-arm: Add system registers added/used by SME by Sascha Bischoff · 1 year, 10 months ago
- 5c43523 arch-arm: Add matrix register support for SME by Sascha Bischoff · 1 year, 10 months ago
- fed81f3 arch,cpu: Add boilerplate support for matrix registers by Sascha Bischoff · 1 year, 10 months ago
- dd6595b mem-cache: masked writes are not whole-line writes by Sascha Bischoff · 1 year, 10 months ago
- befa5ba cpu-o3: print VecPredReg not VecReg by Sascha Bischoff · 1 year, 9 months ago
- 41b5276 cpu-o3: Remove obsolete getRegIds and getTrueId by Sascha Bischoff · 1 year, 10 months ago
- 39bbd9c sim,arch: Remove the GuestABI namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 31a1d48 sim: Remove a couple of deprecated namespaces by Daniel R. Carvalho · 1 year, 5 months ago
- c8e3708 sim: Remove the Enums namespace by Daniel R. Carvalho · 1 year, 5 months ago
- c1c7961 sim: Remove the ProbePoints namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 5f5aae8 dev: Remove a couple of deprecated namespaces by Daniel R. Carvalho · 1 year, 5 months ago
- 1615191 cpu: Remove the Minor namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 2ec3f64 cpu: Remove the DecodeCache namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 93f0de9 misc: Remove the m5 namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 1e80ba7 misc: Remove the Net namespace by Daniel R. Carvalho · 1 year, 5 months ago
- b2bf811 misc: Remove the FreeBSD namespace by Daniel R. Carvalho · 1 year, 5 months ago
- d14cde6 misc: Remove the Linux namespace by Daniel R. Carvalho · 1 year, 5 months ago
- c1839aa fastmodel: Remove the FastModel namespace by Daniel R. Carvalho · 1 year, 5 months ago
- cc3d75a base: Remove the Loader namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 544d537 base: Remove the Units namespace by Daniel R. Carvalho · 1 year, 5 months ago
- d2bfb4a base: Remove the Debug namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 4f480fc base: Remove the Stats namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 65317b6 base: Remove the BloomFilter namespace by Daniel R. Carvalho · 1 year, 5 months ago
- e881f26 mem: Remove the ContextSwitchTaskId namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 813c27c mem: Remove the QoS namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 82aa4c8 mem-cache: Remove the Encoder namespace by Daniel R. Carvalho · 1 year, 5 months ago
- de408fb mem-cache: Remove the Compressor namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 65c15ba mem-cache: Remove the Prefetcher namespace by Daniel R. Carvalho · 1 year, 5 months ago
- d4c1904 mem-cache: Remove the ReplacementPolicy namespace by Daniel R. Carvalho · 1 year, 5 months ago
- 6e74deb mem-cache: use MMU instead of TLB in prefetchers by Nathanael Premillieu · 1 year, 6 months ago
- f785786 fastmodel: Export the "reset_in" reset signal from the PL330. by Gabe Black · 1 year, 5 months ago
- 76b74fa util: use origin/develop as default upstream branch by Giacomo Travaglini · 1 year, 5 months ago
- 899f702 configs: Start using the new CpuCluster class in example/arm by Giacomo Travaglini · 1 year, 7 months ago
- 8149245 cpu: Formalize a CPU cluster class in the gem5 standard library by Giacomo Travaglini · 1 year, 7 months ago
- 4954167 mem: create port_wrapper classes by Earl Ou · 1 year, 5 months ago
- a2658f0 systemc: fix -Wno-free-nonheap-object for building scheduler.cc by Earl Ou · 1 year, 5 months ago
- a7ef5b7 mem: Implemement backdoor interface for Bridge by Yu-hsin Wang · 1 year, 5 months ago
