- de2503f arch-arm: Move RO values from ISA::read to the reset field by Giacomo Travaglini · 1 year, 3 months ago
- 9ef7be90 arch-arm: Add UNSERIALIZE flag to address cpt compatibility by Giacomo Travaglini · 12 months ago
- 5c60160 arch-arm: Fix position of AA64ISAR0.AES bitfield by Giacomo Travaglini · 12 months ago
- 48ae255 sim,python: add activate option and method by Yan Lee · 12 months ago
- b923cbe base: add Activate to enable log of particular targets by Yan Lee · 12 months ago
- ae7476b arch-gcn3,arch-vega: Fix ds_read2st64_b32 by Matthew Poremba · 12 months ago
- 8dac7f5 arch-riscv: Refactor RVC decode flow when funct4==0b1001 and op==C2 by Roger Chang · 12 months ago
- d2aed4f arch-riscv: Treat RVC HINT as nops rather than trap by Roger Chang · 12 months ago
- 27967a4 arch-riscv: Fix the fflags issue for fcvt_d_w, fcvt_d_wu, fcvt_d_l fcvt_d_lu by Roger Chang · 12 months ago
- 331ef9e arch-riscv: Add missing zbkb instructions by Roger Chang · 12 months ago
- 0fa843c arch-arm: VMPIDR_EL2 can be used in secure mode as well by Giacomo Travaglini · 1 year, 3 months ago
- fbca328 arch-arm: Remove clear32/64 methods by Giacomo Travaglini · 1 year, 3 months ago
- db47e9f arch-arm: Remove ISA::initID64 by Giacomo Travaglini · 1 year, 3 months ago
- e3db309 arch-arm: Rewrite ISA::initID64 using BitUnions by Giacomo Travaglini · 1 year, 3 months ago
- b7c16f0 arch-arm: Remove ISA::initID32 by Giacomo Travaglini · 1 year, 3 months ago
- 7abece9 arch-arm: Rewrite ISA::initID32 using BitUnions by Giacomo Travaglini · 1 year, 3 months ago
- c3769af arch-arm: Move MISCREG init logic from ISA to reset field by Giacomo Travaglini · 1 year, 3 months ago
- ec49144 arch-arm: Fix read redirection for MIDR register by Giacomo Travaglini · 1 year, 3 months ago
- 89483ca arch-arm: Map CTR_EL0 to AArch32 version by Giacomo Travaglini · 1 year, 3 months ago
- 1aa8f14 arch-arm: Map MPIDR_EL1 to AArch32 version by Giacomo Travaglini · 1 year, 3 months ago
- 9dcafac arch-arm: Map MIDR_EL1 to AArch32 version by Giacomo Travaglini · 1 year, 3 months ago
- 0d1161c arch-arm: Map MVFR0_EL1/MVFR1_EL1 to AArch32 version by Giacomo Travaglini · 1 year, 3 months ago
- acdf3a6 arch-arm: Generalize SCTLR_RST behaviour by Giacomo Travaglini · 1 year, 3 months ago
- 72f08cc arch-arm: Make MISCREGs reset value configurable by Giacomo Travaglini · 1 year, 3 months ago
- cb15939 arch-arm: Replace 0ing of miscRegs with assignment of reset value by Giacomo Travaglini · 1 year, 3 months ago
- bc4322e configs: Add --pmu-{dump,reset}-stats-on to Arm baremetal.py. by Richard Cooper · 1 year, 8 months ago
- add5e51 arch-arm: Add support to exit the simloop on PMU interrupt by Richard Cooper · 1 year ago
- 5fc8188 arch-arm: Add support to exit the simloop on PMU control by Nicholas Lindsay · 6 years ago
- e90bd5f configs: Add `--with-pmu` option to the simple Arm FS configs by Richard Cooper · 1 year, 1 month ago
- 6dd60a6 base,arch,mem: Remove {GE}M5_VAR_USED instances by Bobby R. Bruce · 12 months ago
- fcb3645 misc: Fix 'unused variable' clang errors with gem5.fast by Bobby R. Bruce · 12 months ago
- c0103aa cpu-o3: Remove duplicated O3 stats by Melissa Jost · 1 year, 2 months ago
- f969c08 cpu: Remove duplicate base inst and op stats by Melissa Jost · 1 year, 2 months ago
- 7403a29 cpu: Remove duplicated execute stats by Melissa Jost · 1 year, 2 months ago
- 1cf1867 cpu: Remove duplicated commit stats by Melissa Jost · 1 year, 2 months ago
- 19323c8 cpu: Remove duplicated fetch stats by Melissa Jost · 1 year, 2 months ago
- a882373 cpu-kvm: Implement IPC and CPI base stats for KVM CPU by Melissa Jost · 1 year, 2 months ago
- 1d035e1 cpu-o3: Copy O3 IEW stats to BaseCPU::ExecuteCPUStats by Melissa Jost · 1 year, 2 months ago
- 53a12bc cpu-o3: Copy general O3 fetch stats to BaseCPU::FetchCPUStats by Melissa Jost · 1 year, 2 months ago
- 4b70c1c cpu-o3: Use base instructions committed counters in O3CPU by Melissa Jost · 1 year, 2 months ago
- 2f93672 cpu: Move numInsts, numOps, ipc, cpi to BaseCPU by Melissa Jost · 1 year, 2 months ago
- ea2bbe2 cpu: Move commit stats from simple to base cpu by Melissa Jost · 1 year, 2 months ago
- 32b18dc cpu: Move execute stats from simple and minor to base by Melissa Jost · 1 year, 2 months ago
- cf6783d cpu: Move fetch stats from simple and minor to base by Melissa Jost · 1 year, 2 months ago
- aff1bfe scons: Fix gem5 Python3.11 build. by Richard Cooper · 1 year ago
- 8d5c9f9 fastmodel: Remove sendFunc by Wei-Han Chen · 1 year ago
- d049d41 arch-riscv: Add RV32 only Zk instruction extensions by Roger Chang · 1 year, 1 month ago
- 2dafebb arch-riscv: seperate RV32 and RV64 Zk extensions by Roger Chang · 1 year, 5 months ago
- dd5b1a6 dev-amdgpu: Remove unused psp_ring_retval integer by Melissa Jost · 1 year ago
- 8659b9e dev-amdgpu: Update vega10_kvm.py to add checkpointing instruction by Vishnu Ramadas · 1 year ago
- 916bcbb arch-riscv: Remove Riscv32CPU instance by Roger Chang · 1 year, 4 months ago
- a02f1f6 tests: Revert "arch-riscv: add RV32 ADFIMU_Zfh instruction tests" by Roger Chang · 1 year ago
- cd76f92 arch-vega: Add decodings for new MI100 VOP2 insts by Matthew Poremba · 1 year ago
- 316538b dev-amdgpu: Enable more GPUs with device specific registers by Matthew Poremba · 1 year ago
- 8b91ac6 dev-amdgpu: Refactor MMIO interface for SDMA engines by Matthew Poremba · 1 year ago
- 6c1b95e dev-amdgpu: Default MMIO reads when previously written by Matthew Poremba · 1 year ago
- 9c3107c dev-amdgpu,configs: Add human readable names for different GPUs by Matthew Poremba · 1 year ago
- f5af8b5 dev-amdgpu: Add a few MQD attributes to GPUFS checkpoint by Vishnu Ramadas · 1 year ago
- 74fcc4d arch-riscv: refactor bitfields of insts by Xuan Hu · 1 year, 2 months ago
- 540c3fc arch: Add vector function unit and OpClass enums by Yang Liu · 1 year, 4 months ago
- 74072cd base: Update <experimental/filesystem> include by Melissa Jost · 1 year, 1 month ago
- 912795a scons: Add stdc++fs and libc++experimental for clang LIBS env by Melissa Jost · 1 year, 1 month ago
- 6fdf0be stdlib: write device tree after setting up bootloader in ARMBoard by Hoa Nguyen · 1 year ago
- c597361 dev-amdgpu: Add writeROM method by Matthew Poremba · 1 year ago
- c2c5cd1 configs: Allow other CPU types in GPUFS by Matthew Poremba · 1 year ago
- 70ef9b2 configs: Add simple check for valid GPU MMIO trace by Matthew Poremba · 1 year ago
- 2f3f73a configs: Use higher dmesg level for GPUFS by Matthew Poremba · 1 year ago
- c127a38 base: Use <experimental/filesystem> include for GCC v7 by Melissa Jost · 1 year, 1 month ago
- e7ae529 base: Fix VNC server initialization by Yen-lin Lai · 1 year, 1 month ago
- 09023d4 mem-ruby: Not flushing data to memory when there's no dirty block by Hoa Nguyen · 1 year, 1 month ago
- 76d1d02 stdlib: Fix SwitchableProcessor use in SE mode by Bobby R. Bruce · 1 year, 2 months ago
- 851e469 scons: Add "--no-duplicate-sources" option to SConstruct in util/ by Hoa Nguyen · 1 year, 1 month ago
- 9ec1b93 configs: Add --exit-on-uart-eot flag to Arm baremetal.py config by Richard Cooper · 1 year, 1 month ago
- 80eb8be configs: Update Arm simple configs to enable --interactive option by Richard Cooper · 1 year, 8 months ago
- c8496d8 configs: Add the O3 CPU as an option to baremetal.py by Richard Cooper · 1 year, 7 months ago
- 5138092 configs: Make the configuration of the gicv4 parameter robust by Richard Cooper · 1 year, 8 months ago
- a83f699 configs: Add Tarmac tracing option to the simple Arm configs by Richard Cooper · 1 year, 8 months ago
- 324ac18 arch-arm: Add an option to use 64-bit PMU counters by Richard Cooper · 1 year, 8 months ago
- ed9effc dev-arm: Fix writes to Arm GICv2 GICD_IGROUPRn by Richard Cooper · 1 year, 8 months ago
- 06637a2 arch-arm: Add more detailed debug messages to GICv2. by Richard Cooper · 1 year, 8 months ago
- 27aab0f arch-arm: Fix formatting of v8 Tarmac Register records by Richard Cooper · 1 year, 8 months ago
- dcc14ba configs: Update Arm starter_se.py for new CpuCluster abstraction by Richard Cooper · 1 year, 1 month ago
- d02cba9 cpu: Add CpuCluster method to allow querying the number of CPUs. by Richard Cooper · 1 year, 1 month ago
- 640891a scons: Fix "no-duplicate-sources" to include .hh when not set by Bobby R. Bruce · 1 year, 1 month ago
- d95890d python: Fix broken call to m5.fatal in _check_tracing() by Richard Cooper · 2 years, 8 months ago
- 6c4f405 arch-riscv: Insert symbol table of bootloader into debug symbol table by Roger Chang · 1 year, 1 month ago
- 0af4b60 base: fatal() if a socket path doesn't fit in sockaddr_un.sun_path. by Gabe Black · 1 year, 1 month ago
- 716c154 arch,base,dev,sim: Convert objects to use the HostSocket param type. by Gabe Black · 1 year, 2 months ago
- 2a44f3b base: Remove the now unused UnixSocketAddr class and associated code. by Gabe Black · 1 year, 2 months ago
- 57aaccd base,python: Add a param type for host sockets. by Gabe Black · 1 year, 2 months ago
- e4a46cb arch-riscv: Refactor the shouldCheckPMP function by Roger Chang · 1 year, 1 month ago
- e37b1d1 arch-riscv: Fix the address check of pmp by Roger Chang · 1 year, 1 month ago
- f9cf3de mem: Use HostSocket in the SharedMemoryServer. by Gabe Black · 1 year, 2 months ago
- e79d661 base: Use <experimental/filesystem> include for GCC v7 by Bobby R. Bruce · 1 year, 1 month ago
- 1258f48 scons: Add '-lstdc++fs' to LIBS env when GCC version < 9 by Bobby R. Bruce · 1 year, 1 month ago
- 7eff90a base: Add support for unix domain sockets in ListenSocket. by Gabe Black · 1 year, 2 months ago
- f15ddf8 configs: Fix RISCVMatched Test by Melissa Jost · 1 year, 1 month ago
- 5a943ce util: Add a missing free() to m5term. by Gabe Black · 1 year, 1 month ago
- d632bba stdlib: small fix in spec-2006 and spec-2007 by HJikram · 1 year, 1 month ago
- 2f5c87c dev: Add an "abortPending" method to the DMA port class. by Gabe Black · 1 year, 1 month ago
