commit 0be6953fee765c08c952462938f133fed181166e
author Gabe Black <gabeblack@google.com> Mon Nov 19 16:50:41 2018 -0800
committer Gabe Black <gabeblack@google.com> Tue Dec 18 19:22:02 2018 +0000
tree 2f443774f47fd2917a10ee4ae9e6df8470e97d1d
parent c04578791ec20a5a41d02ed0ba8da10f0b29ca20

arch: Make the ISA parser always use binary floating point accessors.

Any operands which use read_code or write_code would need to start
using the floatToBits and bitsToFloat, but only ARM is using that
mechanism, and not on float operands.

Also I notice that the "predicate" mechanism for operands ignores the
read_code and write_code mechanism, and using both will not work
correctly. This change makes no attempt to fix that problem, but
shouldn't contribute to it either.

Change-Id: I0e3a7f78ed28f40cb66958ef12c32e862950fde0
Reviewed-on: https://gem5-review.googlesource.com/c/14456
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>

src/arch/isa_parser.py

diff --git a/src/arch/isa_parser.py b/src/arch/isa_parser.py
index a65149f..9ac7612 100755
--- a/src/arch/isa_parser.py
+++ b/src/arch/isa_parser.py
@@ -617,35 +617,37 @@
         return c_src + c_dest
 
     def makeRead(self, predRead):
-        bit_select = 0
-        if (self.ctype == 'float' or self.ctype == 'double'):
-            func = 'readFloatRegOperand'
-        else:
-            func = 'readFloatRegOperandBits'
         if self.read_code != None:
-            return self.buildReadCode(func)
+            return self.buildReadCode('readFloatRegOperandBits')
 
         if predRead:
             rindex = '_sourceIndex++'
         else:
             rindex = '%d' % self.src_reg_idx
 
-        return '%s = xc->%s(this, %s);\n' % \
-            (self.base_name, func, rindex)
+        code = 'xc->readFloatRegOperandBits(this, %s)' % rindex
+        if self.ctype == 'float':
+            code = 'bitsToFloat32(%s)' % code
+        elif self.ctype == 'double':
+            code = 'bitsToFloat64(%s)' % code
+        return '%s = %s;\n' % (self.base_name, code)
 
     def makeWrite(self, predWrite):
-        if (self.ctype == 'float' or self.ctype == 'double'):
-            func = 'setFloatRegOperand'
-        else:
-            func = 'setFloatRegOperandBits'
         if self.write_code != None:
-            return self.buildWriteCode(func)
+            return self.buildWriteCode('setFloatRegOperandBits')
 
         if predWrite:
             wp = '_destIndex++'
         else:
             wp = '%d' % self.dest_reg_idx
-        wp = 'xc->%s(this, %s, final_val);' % (func, wp)
+
+        val = 'final_val'
+        if self.ctype == 'float':
+            val = 'floatToBits32(%s)' % val
+        elif self.ctype == 'double':
+            val = 'floatToBits64(%s)' % val
+
+        wp = 'xc->setFloatRegOperandBits(this, %s, %s);' % (wp, val)
 
         wb = '''
         {