commit 2dd0eed7ae031c113c71bda1975d6035cca0998e
author Giacomo Travaglini <giacomo.travaglini@arm.com> Fri Feb 15 09:47:34 2019 +0000
committer Giacomo Travaglini <giacomo.travaglini@arm.com> Fri Feb 15 16:32:25 2019 +0000
tree 502448e29f97dbc0fb8ac705e9f9a97495c55404
parent 9e340ba626f6e261246e75703604414b5623484e

cpu: Fix fast build broken due to unused variable

This fixes fast build for commit 25dc765889d948693995cfa622f001aa94b5364b
(fast build is striping out assertions)

Change-Id: I9536ad58a3d85990b16a1f8c2515f6bf5d3acf71
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16463
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

src/cpu/o3/lsq_impl.hh

diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index abe751c..5c64377 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -685,7 +685,7 @@
     // This comming request can be either load, store or atomic.
     // Atomic request has a corresponding pointer to its atomic memory
     // operation
-    bool isAtomic = !isLoad && amo_op;
+    bool isAtomic M5_VAR_USED = !isLoad && amo_op;
 
     ThreadID tid = cpu->contextToThread(inst->contextId());
     auto cacheLineSize = cpu->cacheLineSize();