| /* |
| * Copyright (c) 2013 ARM Limited |
| * All rights reserved |
| * |
| * The license below extends only to copyright in the software and shall |
| * not be construed as granting a license to any other intellectual |
| * property including but not limited to intellectual property relating |
| * to a hardware implementation of the functionality of the software |
| * licensed hereunder. You may use the software subject to the license |
| * terms below provided that you ensure that this notice is replicated |
| * unmodified and in its entirety in all distributions of the software, |
| * modified or unmodified, in source code or in binary form. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions are |
| * met: redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer; |
| * redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution; |
| * neither the name of the copyright holders nor the names of its |
| * contributors may be used to endorse or promote products derived from |
| * this software without specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| * |
| * Authors: Andreas Hansson |
| */ |
| |
| #ifndef __ARCH_NULL_REGISTERS_HH__ |
| #define __ARCH_NULL_REGISTERS_HH__ |
| |
| #include "arch/generic/vec_reg.hh" |
| #include "arch/types.hh" |
| #include "base/types.hh" |
| |
| namespace NullISA { |
| |
| typedef uint64_t IntReg; |
| typedef uint32_t FloatRegBits; |
| typedef float FloatReg; |
| typedef uint8_t CCReg; |
| typedef uint64_t MiscReg; |
| const RegIndex ZeroReg = 0; |
| |
| // dummy typedefs since we don't have vector regs |
| constexpr unsigned NumVecElemPerVecReg = 2; |
| using VecElem = uint32_t; |
| using VecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, false>; |
| using ConstVecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, true>; |
| using VecRegContainer = VecReg::Container; |
| // This has to be one to prevent warnings that are treated as errors |
| constexpr unsigned NumVecRegs = 1; |
| |
| } |
| |
| #endif // __ARCH_NULL_REGISTERS_HH__ |
