commit b25900fd3ce31e95187d3a9520939a2faa1bb5c7
author Andreas Sandberg <andreas.sandberg@arm.com> Wed Jan 09 16:20:20 2019 +0000
committer Andreas Sandberg <andreas.sandberg@arm.com> Thu Jan 10 17:55:42 2019 +0000
tree 691c109ac0e50ce76e24ca3f84afe0b8826b1261
parent 46d6137f01d7321172f00f4ae3f697018739396d

arch-arm, sim-se: Add support for TLS in clone

Change-Id: I1f78dce05a48a2e3adfaf027cd38ab55507b9611
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Cc: Giacomo Travaglini <giacomo.travaglini@arm.com>
Cc: Javier Setoain <javier.setoain@arm.com>
Cc: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15437
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>

src/arch/arm/linux/linux.hh

diff --git a/src/arch/arm/linux/linux.hh b/src/arch/arm/linux/linux.hh
index e1f27a7..cff1e47 100644
--- a/src/arch/arm/linux/linux.hh
+++ b/src/arch/arm/linux/linux.hh
@@ -58,6 +58,12 @@
               uint64_t stack, uint64_t tls)
     {
         ArmISA::copyRegs(ptc, ctc);
+
+        if (flags & TGT_CLONE_SETTLS) {
+            /* TPIDR_EL0 is architecturally mapped to TPIDRURW, so
+             * this works for both aarch32 and aarch64. */
+            ctc->setMiscReg(ArmISA::MISCREG_TPIDR_EL0, tls);
+        }
     }
 };