| // -*- mode:c++ -*- |
| |
| // Copyright (c) 2010, 2011, 2018 ARM Limited |
| // All rights reserved |
| // |
| // The license below extends only to copyright in the software and shall |
| // not be construed as granting a license to any other intellectual |
| // property including but not limited to intellectual property relating |
| // to a hardware implementation of the functionality of the software |
| // licensed hereunder. You may use the software subject to the license |
| // terms below provided that you ensure that this notice is replicated |
| // unmodified and in its entirety in all distributions of the software, |
| // modified or unmodified, in source code or in binary form. |
| // |
| // Copyright (c) 2007-2008 The Florida State University |
| // All rights reserved. |
| // |
| // Redistribution and use in source and binary forms, with or without |
| // modification, are permitted provided that the following conditions are |
| // met: redistributions of source code must retain the above copyright |
| // notice, this list of conditions and the following disclaimer; |
| // redistributions in binary form must reproduce the above copyright |
| // notice, this list of conditions and the following disclaimer in the |
| // documentation and/or other materials provided with the distribution; |
| // neither the name of the copyright holders nor the names of its |
| // contributors may be used to endorse or promote products derived from |
| // this software without specific prior written permission. |
| // |
| // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| // |
| // Authors: Stephen Hines |
| |
| //////////////////////////////////////////////////////////////////// |
| // |
| // Bitfield definitions. |
| // |
| |
| // Opcode fields |
| def bitfield DECODERFAULT decoderFault; |
| def bitfield ILLEGALEXEC illegalExecution; |
| |
| def bitfield ENCODING encoding; |
| def bitfield OPCODE opcode; |
| def bitfield MEDIA_OPCODE mediaOpcode; |
| def bitfield MEDIA_OPCODE2 mediaOpcode2; |
| def bitfield USEIMM useImm; |
| def bitfield OPCODE_24 opcode24; |
| def bitfield OPCODE_24_23 opcode24_23; |
| def bitfield OPCODE_23_20 opcode23_20; |
| def bitfield OPCODE_23_21 opcode23_21; |
| def bitfield OPCODE_22 opcode22; |
| def bitfield OPCODE_20 opcode20; |
| def bitfield OPCODE_19_16 opcode19_16; |
| def bitfield OPCODE_19 opcode19; |
| def bitfield OPCODE_18 opcode18; |
| def bitfield OPCODE_15_12 opcode15_12; |
| def bitfield OPCODE_15 opcode15; |
| def bitfield MISC_OPCODE miscOpcode; |
| def bitfield OPC2 opc2; |
| def bitfield OPCODE_7 opcode7; |
| def bitfield OPCODE_6 opcode6; |
| def bitfield OPCODE_4 opcode4; |
| |
| def bitfield IS_MISC isMisc; |
| def bitfield SEVEN_AND_FOUR sevenAndFour; |
| |
| def bitfield THUMB thumb; |
| def bitfield BIGTHUMB bigThumb; |
| def bitfield AARCH64 aarch64; |
| |
| // Other |
| def bitfield COND_CODE condCode; |
| def bitfield S_FIELD sField; |
| def bitfield RN rn; |
| def bitfield RD rd; |
| def bitfield RT rt; |
| def bitfield SHIFT_SIZE shiftSize; |
| def bitfield SHIFT shift; |
| def bitfield RM rm; |
| |
| def bitfield RS rs; |
| |
| def bitfield PUSWL puswl; |
| def bitfield PREPOST puswl.prepost; |
| def bitfield UP puswl.up; |
| def bitfield PSRUSER puswl.psruser; |
| def bitfield WRITEBACK puswl.writeback; |
| def bitfield LOADOP puswl.loadOp; |
| |
| def bitfield PUBWL pubwl; |
| |
| def bitfield IMM imm; |
| |
| def bitfield IMMED_11_0 immed11_0; |
| def bitfield IMMED_7_0 immed7_0; |
| |
| def bitfield IMMED_HI_11_8 immedHi11_8; |
| def bitfield IMMED_LO_3_0 immedLo3_0; |
| |
| def bitfield IMMED_23_0 immed23_0; |
| |
| def bitfield CPNUM cpNum; |
| // Note that FP Regs are only 3 bits |
| def bitfield FN fn; |
| def bitfield FD fd; |
| def bitfield FPREGIMM fpRegImm; |
| // We can just use 3:0 for FM since the hard-wired FP regs are handled in |
| // float_regfile.hh |
| def bitfield FM fm; |
| def bitfield FPIMM fpImm; |
| def bitfield PUNWL punwl; |
| |
| // M5 instructions |
| def bitfield M5FUNC m5Func; |
| |
| // 16 bit thumb bitfields |
| def bitfield TOPCODE_15_13 topcode15_13; |
| def bitfield TOPCODE_13_11 topcode13_11; |
| def bitfield TOPCODE_12_11 topcode12_11; |
| def bitfield TOPCODE_12_10 topcode12_10; |
| def bitfield TOPCODE_11_9 topcode11_9; |
| def bitfield TOPCODE_11_8 topcode11_8; |
| def bitfield TOPCODE_10_9 topcode10_9; |
| def bitfield TOPCODE_10_8 topcode10_8; |
| def bitfield TOPCODE_9_6 topcode9_6; |
| def bitfield TOPCODE_7 topcode7; |
| def bitfield TOPCODE_7_6 topcode7_6; |
| def bitfield TOPCODE_7_5 topcode7_5; |
| def bitfield TOPCODE_7_4 topcode7_4; |
| def bitfield TOPCODE_3_0 topcode3_0; |
| |
| // 32 bit thumb bitfields |
| def bitfield HTOPCODE_12_11 htopcode12_11; |
| def bitfield HTOPCODE_10_9 htopcode10_9; |
| def bitfield HTOPCODE_9 htopcode9; |
| def bitfield HTOPCODE_9_8 htopcode9_8; |
| def bitfield HTOPCODE_9_5 htopcode9_5; |
| def bitfield HTOPCODE_9_4 htopcode9_4; |
| def bitfield HTOPCODE_8 htopcode8; |
| def bitfield HTOPCODE_8_7 htopcode8_7; |
| def bitfield HTOPCODE_8_6 htopcode8_6; |
| def bitfield HTOPCODE_8_5 htopcode8_5; |
| def bitfield HTOPCODE_7 htopcode7; |
| def bitfield HTOPCODE_7_5 htopcode7_5; |
| def bitfield HTOPCODE_6 htopcode6; |
| def bitfield HTOPCODE_6_5 htopcode6_5; |
| def bitfield HTOPCODE_5_4 htopcode5_4; |
| def bitfield HTOPCODE_4 htopcode4; |
| |
| def bitfield HTRN htrn; |
| def bitfield HTS hts; |
| |
| def bitfield LTOPCODE_15 ltopcode15; |
| def bitfield LTOPCODE_11_8 ltopcode11_8; |
| def bitfield LTOPCODE_7_6 ltopcode7_6; |
| def bitfield LTOPCODE_7_4 ltopcode7_4; |
| def bitfield LTOPCODE_4 ltopcode4; |
| |
| def bitfield LTRD ltrd; |
| def bitfield LTCOPROC ltcoproc; |
