| |
| ---------- Begin Simulation Statistics ---------- |
| sim_seconds 0.000052 |
| sim_ticks 52453000 |
| final_tick 52453000 |
| sim_freq 1000000000000 |
| host_inst_rate 255460 |
| host_op_rate 295178 |
| host_tick_rate 2680706051 |
| host_mem_usage 666596 |
| host_seconds 0.02 |
| sim_insts 4988 |
| sim_ops 5770 |
| system.clk_domain.voltage_domain.voltage 1 |
| system.clk_domain.clock 1000 |
| system.mem_ctrl.pwrStateResidencyTicks::UNDEFINED 52453000 |
| system.mem_ctrl.bytes_read::cpu.inst 14400 |
| system.mem_ctrl.bytes_read::cpu.data 8064 |
| system.mem_ctrl.bytes_read::total 22464 |
| system.mem_ctrl.bytes_inst_read::cpu.inst 14400 |
| system.mem_ctrl.bytes_inst_read::total 14400 |
| system.mem_ctrl.num_reads::cpu.inst 225 |
| system.mem_ctrl.num_reads::cpu.data 126 |
| system.mem_ctrl.num_reads::total 351 |
| system.mem_ctrl.bw_read::cpu.inst 274531485 |
| system.mem_ctrl.bw_read::cpu.data 153737632 |
| system.mem_ctrl.bw_read::total 428269117 |
| system.mem_ctrl.bw_inst_read::cpu.inst 274531485 |
| system.mem_ctrl.bw_inst_read::total 274531485 |
| system.mem_ctrl.bw_total::cpu.inst 274531485 |
| system.mem_ctrl.bw_total::cpu.data 153737632 |
| system.mem_ctrl.bw_total::total 428269117 |
| system.mem_ctrl.readReqs 351 |
| system.mem_ctrl.writeReqs 0 |
| system.mem_ctrl.readBursts 351 |
| system.mem_ctrl.writeBursts 0 |
| system.mem_ctrl.bytesReadDRAM 22464 |
| system.mem_ctrl.bytesReadWrQ 0 |
| system.mem_ctrl.bytesWritten 0 |
| system.mem_ctrl.bytesReadSys 22464 |
| system.mem_ctrl.bytesWrittenSys 0 |
| system.mem_ctrl.servicedByWrQ 0 |
| system.mem_ctrl.mergedWrBursts 0 |
| system.mem_ctrl.neitherReadNorWriteReqs 0 |
| system.mem_ctrl.perBankRdBursts::0 78 |
| system.mem_ctrl.perBankRdBursts::1 42 |
| system.mem_ctrl.perBankRdBursts::2 13 |
| system.mem_ctrl.perBankRdBursts::3 33 |
| system.mem_ctrl.perBankRdBursts::4 14 |
| system.mem_ctrl.perBankRdBursts::5 31 |
| system.mem_ctrl.perBankRdBursts::6 34 |
| system.mem_ctrl.perBankRdBursts::7 9 |
| system.mem_ctrl.perBankRdBursts::8 4 |
| system.mem_ctrl.perBankRdBursts::9 6 |
| system.mem_ctrl.perBankRdBursts::10 25 |
| system.mem_ctrl.perBankRdBursts::11 43 |
| system.mem_ctrl.perBankRdBursts::12 8 |
| system.mem_ctrl.perBankRdBursts::13 5 |
| system.mem_ctrl.perBankRdBursts::14 0 |
| system.mem_ctrl.perBankRdBursts::15 6 |
| system.mem_ctrl.perBankWrBursts::0 0 |
| system.mem_ctrl.perBankWrBursts::1 0 |
| system.mem_ctrl.perBankWrBursts::2 0 |
| system.mem_ctrl.perBankWrBursts::3 0 |
| system.mem_ctrl.perBankWrBursts::4 0 |
| system.mem_ctrl.perBankWrBursts::5 0 |
| system.mem_ctrl.perBankWrBursts::6 0 |
| system.mem_ctrl.perBankWrBursts::7 0 |
| system.mem_ctrl.perBankWrBursts::8 0 |
| system.mem_ctrl.perBankWrBursts::9 0 |
| system.mem_ctrl.perBankWrBursts::10 0 |
| system.mem_ctrl.perBankWrBursts::11 0 |
| system.mem_ctrl.perBankWrBursts::12 0 |
| system.mem_ctrl.perBankWrBursts::13 0 |
| system.mem_ctrl.perBankWrBursts::14 0 |
| system.mem_ctrl.perBankWrBursts::15 0 |
| system.mem_ctrl.numRdRetry 0 |
| system.mem_ctrl.numWrRetry 0 |
| system.mem_ctrl.totGap 52348000 |
| system.mem_ctrl.readPktSize::0 0 |
| system.mem_ctrl.readPktSize::1 0 |
| system.mem_ctrl.readPktSize::2 0 |
| system.mem_ctrl.readPktSize::3 0 |
| system.mem_ctrl.readPktSize::4 0 |
| system.mem_ctrl.readPktSize::5 0 |
| system.mem_ctrl.readPktSize::6 351 |
| system.mem_ctrl.writePktSize::0 0 |
| system.mem_ctrl.writePktSize::1 0 |
| system.mem_ctrl.writePktSize::2 0 |
| system.mem_ctrl.writePktSize::3 0 |
| system.mem_ctrl.writePktSize::4 0 |
| system.mem_ctrl.writePktSize::5 0 |
| system.mem_ctrl.writePktSize::6 0 |
| system.mem_ctrl.rdQLenPdf::0 351 |
| system.mem_ctrl.rdQLenPdf::1 0 |
| system.mem_ctrl.rdQLenPdf::2 0 |
| system.mem_ctrl.rdQLenPdf::3 0 |
| system.mem_ctrl.rdQLenPdf::4 0 |
| system.mem_ctrl.rdQLenPdf::5 0 |
| system.mem_ctrl.rdQLenPdf::6 0 |
| system.mem_ctrl.rdQLenPdf::7 0 |
| system.mem_ctrl.rdQLenPdf::8 0 |
| system.mem_ctrl.rdQLenPdf::9 0 |
| system.mem_ctrl.rdQLenPdf::10 0 |
| system.mem_ctrl.rdQLenPdf::11 0 |
| system.mem_ctrl.rdQLenPdf::12 0 |
| system.mem_ctrl.rdQLenPdf::13 0 |
| system.mem_ctrl.rdQLenPdf::14 0 |
| system.mem_ctrl.rdQLenPdf::15 0 |
| system.mem_ctrl.rdQLenPdf::16 0 |
| system.mem_ctrl.rdQLenPdf::17 0 |
| system.mem_ctrl.rdQLenPdf::18 0 |
| system.mem_ctrl.rdQLenPdf::19 0 |
| system.mem_ctrl.rdQLenPdf::20 0 |
| system.mem_ctrl.rdQLenPdf::21 0 |
| system.mem_ctrl.rdQLenPdf::22 0 |
| system.mem_ctrl.rdQLenPdf::23 0 |
| system.mem_ctrl.rdQLenPdf::24 0 |
| system.mem_ctrl.rdQLenPdf::25 0 |
| system.mem_ctrl.rdQLenPdf::26 0 |
| system.mem_ctrl.rdQLenPdf::27 0 |
| system.mem_ctrl.rdQLenPdf::28 0 |
| system.mem_ctrl.rdQLenPdf::29 0 |
| system.mem_ctrl.rdQLenPdf::30 0 |
| system.mem_ctrl.rdQLenPdf::31 0 |
| system.mem_ctrl.wrQLenPdf::0 0 |
| system.mem_ctrl.wrQLenPdf::1 0 |
| system.mem_ctrl.wrQLenPdf::2 0 |
| system.mem_ctrl.wrQLenPdf::3 0 |
| system.mem_ctrl.wrQLenPdf::4 0 |
| system.mem_ctrl.wrQLenPdf::5 0 |
| system.mem_ctrl.wrQLenPdf::6 0 |
| system.mem_ctrl.wrQLenPdf::7 0 |
| system.mem_ctrl.wrQLenPdf::8 0 |
| system.mem_ctrl.wrQLenPdf::9 0 |
| system.mem_ctrl.wrQLenPdf::10 0 |
| system.mem_ctrl.wrQLenPdf::11 0 |
| system.mem_ctrl.wrQLenPdf::12 0 |
| system.mem_ctrl.wrQLenPdf::13 0 |
| system.mem_ctrl.wrQLenPdf::14 0 |
| system.mem_ctrl.wrQLenPdf::15 0 |
| system.mem_ctrl.wrQLenPdf::16 0 |
| system.mem_ctrl.wrQLenPdf::17 0 |
| system.mem_ctrl.wrQLenPdf::18 0 |
| system.mem_ctrl.wrQLenPdf::19 0 |
| system.mem_ctrl.wrQLenPdf::20 0 |
| system.mem_ctrl.wrQLenPdf::21 0 |
| system.mem_ctrl.wrQLenPdf::22 0 |
| system.mem_ctrl.wrQLenPdf::23 0 |
| system.mem_ctrl.wrQLenPdf::24 0 |
| system.mem_ctrl.wrQLenPdf::25 0 |
| system.mem_ctrl.wrQLenPdf::26 0 |
| system.mem_ctrl.wrQLenPdf::27 0 |
| system.mem_ctrl.wrQLenPdf::28 0 |
| system.mem_ctrl.wrQLenPdf::29 0 |
| system.mem_ctrl.wrQLenPdf::30 0 |
| system.mem_ctrl.wrQLenPdf::31 0 |
| system.mem_ctrl.wrQLenPdf::32 0 |
| system.mem_ctrl.wrQLenPdf::33 0 |
| system.mem_ctrl.wrQLenPdf::34 0 |
| system.mem_ctrl.wrQLenPdf::35 0 |
| system.mem_ctrl.wrQLenPdf::36 0 |
| system.mem_ctrl.wrQLenPdf::37 0 |
| system.mem_ctrl.wrQLenPdf::38 0 |
| system.mem_ctrl.wrQLenPdf::39 0 |
| system.mem_ctrl.wrQLenPdf::40 0 |
| system.mem_ctrl.wrQLenPdf::41 0 |
| system.mem_ctrl.wrQLenPdf::42 0 |
| system.mem_ctrl.wrQLenPdf::43 0 |
| system.mem_ctrl.wrQLenPdf::44 0 |
| system.mem_ctrl.wrQLenPdf::45 0 |
| system.mem_ctrl.wrQLenPdf::46 0 |
| system.mem_ctrl.wrQLenPdf::47 0 |
| system.mem_ctrl.wrQLenPdf::48 0 |
| system.mem_ctrl.wrQLenPdf::49 0 |
| system.mem_ctrl.wrQLenPdf::50 0 |
| system.mem_ctrl.wrQLenPdf::51 0 |
| system.mem_ctrl.wrQLenPdf::52 0 |
| system.mem_ctrl.wrQLenPdf::53 0 |
| system.mem_ctrl.wrQLenPdf::54 0 |
| system.mem_ctrl.wrQLenPdf::55 0 |
| system.mem_ctrl.wrQLenPdf::56 0 |
| system.mem_ctrl.wrQLenPdf::57 0 |
| system.mem_ctrl.wrQLenPdf::58 0 |
| system.mem_ctrl.wrQLenPdf::59 0 |
| system.mem_ctrl.wrQLenPdf::60 0 |
| system.mem_ctrl.wrQLenPdf::61 0 |
| system.mem_ctrl.wrQLenPdf::62 0 |
| system.mem_ctrl.wrQLenPdf::63 0 |
| system.mem_ctrl.bytesPerActivate::samples 75 |
| system.mem_ctrl.bytesPerActivate::mean 285.866667 |
| system.mem_ctrl.bytesPerActivate::gmean 188.503913 |
| system.mem_ctrl.bytesPerActivate::stdev 282.583704 |
| system.mem_ctrl.bytesPerActivate::0-127 22 29.33% 29.33% |
| system.mem_ctrl.bytesPerActivate::128-255 20 26.67% 56.00% |
| system.mem_ctrl.bytesPerActivate::256-383 15 20.00% 76.00% |
| system.mem_ctrl.bytesPerActivate::384-511 4 5.33% 81.33% |
| system.mem_ctrl.bytesPerActivate::512-639 4 5.33% 86.67% |
| system.mem_ctrl.bytesPerActivate::640-767 2 2.67% 89.33% |
| system.mem_ctrl.bytesPerActivate::768-895 2 2.67% 92.00% |
| system.mem_ctrl.bytesPerActivate::1024-1151 6 8.00% 100.00% |
| system.mem_ctrl.bytesPerActivate::total 75 |
| system.mem_ctrl.totQLat 4720500 |
| system.mem_ctrl.totMemAccLat 11301750 |
| system.mem_ctrl.totBusLat 1755000 |
| system.mem_ctrl.avgQLat 13448.72 |
| system.mem_ctrl.avgBusLat 5000.00 |
| system.mem_ctrl.avgMemAccLat 32198.72 |
| system.mem_ctrl.avgRdBW 428.27 |
| system.mem_ctrl.avgWrBW 0.00 |
| system.mem_ctrl.avgRdBWSys 428.27 |
| system.mem_ctrl.avgWrBWSys 0.00 |
| system.mem_ctrl.peakBW 12800.00 |
| system.mem_ctrl.busUtil 3.35 |
| system.mem_ctrl.busUtilRead 3.35 |
| system.mem_ctrl.busUtilWrite 0.00 |
| system.mem_ctrl.avgRdQLen 1.00 |
| system.mem_ctrl.avgWrQLen 0.00 |
| system.mem_ctrl.readRowHits 270 |
| system.mem_ctrl.writeRowHits 0 |
| system.mem_ctrl.readRowHitRate 76.92 |
| system.mem_ctrl.writeRowHitRate nan |
| system.mem_ctrl.avgGap 149139.60 |
| system.mem_ctrl.pageHitRate 76.92 |
| system.mem_ctrl_0.actEnergy 378420 |
| system.mem_ctrl_0.preEnergy 189750 |
| system.mem_ctrl_0.readEnergy 1813560 |
| system.mem_ctrl_0.writeEnergy 0 |
| system.mem_ctrl_0.refreshEnergy 3687840.000000 |
| system.mem_ctrl_0.actBackEnergy 4500720 |
| system.mem_ctrl_0.preBackEnergy 84480 |
| system.mem_ctrl_0.actPowerDownEnergy 19212990 |
| system.mem_ctrl_0.prePowerDownEnergy 88320 |
| system.mem_ctrl_0.selfRefreshEnergy 0 |
| system.mem_ctrl_0.totalEnergy 29956080 |
| system.mem_ctrl_0.averagePower 571.095108 |
| system.mem_ctrl_0.totalIdleTime 42304000 |
| system.mem_ctrl_0.memoryStateTime::IDLE 53000 |
| system.mem_ctrl_0.memoryStateTime::REF 1560000 |
| system.mem_ctrl_0.memoryStateTime::SREF 0 |
| system.mem_ctrl_0.memoryStateTime::PRE_PDN 229750 |
| system.mem_ctrl_0.memoryStateTime::ACT 8478750 |
| system.mem_ctrl_0.memoryStateTime::ACT_PDN 42131500 |
| system.mem_ctrl_1.actEnergy 199920 |
| system.mem_ctrl_1.preEnergy 94875 |
| system.mem_ctrl_1.readEnergy 692580 |
| system.mem_ctrl_1.writeEnergy 0 |
| system.mem_ctrl_1.refreshEnergy 3687840.000000 |
| system.mem_ctrl_1.actBackEnergy 2032620 |
| system.mem_ctrl_1.preBackEnergy 139680 |
| system.mem_ctrl_1.actPowerDownEnergy 19936320 |
| system.mem_ctrl_1.prePowerDownEnergy 1502400 |
| system.mem_ctrl_1.selfRefreshEnergy 0 |
| system.mem_ctrl_1.totalEnergy 28286235 |
| system.mem_ctrl_1.averagePower 539.260491 |
| system.mem_ctrl_1.totalIdleTime 44784500 |
| system.mem_ctrl_1.memoryStateTime::IDLE 200000 |
| system.mem_ctrl_1.memoryStateTime::REF 1560000 |
| system.mem_ctrl_1.memoryStateTime::SREF 0 |
| system.mem_ctrl_1.memoryStateTime::PRE_PDN 3909750 |
| system.mem_ctrl_1.memoryStateTime::ACT 3056250 |
| system.mem_ctrl_1.memoryStateTime::ACT_PDN 43727000 |
| system.pwrStateResidencyTicks::UNDEFINED 52453000 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 52453000 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 |
| system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 |
| system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 |
| system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 |
| system.cpu.dstage2_mmu.stage2_tlb.read_misses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.write_hits 0 |
| system.cpu.dstage2_mmu.stage2_tlb.write_misses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0 |
| system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva 0 |
| system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 |
| system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid 0 |
| system.cpu.dstage2_mmu.stage2_tlb.flush_entries 0 |
| system.cpu.dstage2_mmu.stage2_tlb.align_faults 0 |
| system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults 0 |
| system.cpu.dstage2_mmu.stage2_tlb.domain_faults 0 |
| system.cpu.dstage2_mmu.stage2_tlb.perms_faults 0 |
| system.cpu.dstage2_mmu.stage2_tlb.read_accesses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.write_accesses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.hits 0 |
| system.cpu.dstage2_mmu.stage2_tlb.misses 0 |
| system.cpu.dstage2_mmu.stage2_tlb.accesses 0 |
| system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 52453000 |
| system.cpu.dtb.walker.walks 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Requested::Data 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Requested::total 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0 |
| system.cpu.dtb.walker.walkRequestOrigin_Completed::total 0 |
| system.cpu.dtb.walker.walkRequestOrigin::total 0 |
| system.cpu.dtb.inst_hits 0 |
| system.cpu.dtb.inst_misses 0 |
| system.cpu.dtb.read_hits 0 |
| system.cpu.dtb.read_misses 0 |
| system.cpu.dtb.write_hits 0 |
| system.cpu.dtb.write_misses 0 |
| system.cpu.dtb.flush_tlb 0 |
| system.cpu.dtb.flush_tlb_mva 0 |
| system.cpu.dtb.flush_tlb_mva_asid 0 |
| system.cpu.dtb.flush_tlb_asid 0 |
| system.cpu.dtb.flush_entries 0 |
| system.cpu.dtb.align_faults 0 |
| system.cpu.dtb.prefetch_faults 0 |
| system.cpu.dtb.domain_faults 0 |
| system.cpu.dtb.perms_faults 0 |
| system.cpu.dtb.read_accesses 0 |
| system.cpu.dtb.write_accesses 0 |
| system.cpu.dtb.inst_accesses 0 |
| system.cpu.dtb.hits 0 |
| system.cpu.dtb.misses 0 |
| system.cpu.dtb.accesses 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 52453000 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walks 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 |
| system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 |
| system.cpu.istage2_mmu.stage2_tlb.inst_hits 0 |
| system.cpu.istage2_mmu.stage2_tlb.inst_misses 0 |
| system.cpu.istage2_mmu.stage2_tlb.read_hits 0 |
| system.cpu.istage2_mmu.stage2_tlb.read_misses 0 |
| system.cpu.istage2_mmu.stage2_tlb.write_hits 0 |
| system.cpu.istage2_mmu.stage2_tlb.write_misses 0 |
| system.cpu.istage2_mmu.stage2_tlb.flush_tlb 0 |
| system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva 0 |
| system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 |
| system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid 0 |
| system.cpu.istage2_mmu.stage2_tlb.flush_entries 0 |
| system.cpu.istage2_mmu.stage2_tlb.align_faults 0 |
| system.cpu.istage2_mmu.stage2_tlb.prefetch_faults 0 |
| system.cpu.istage2_mmu.stage2_tlb.domain_faults 0 |
| system.cpu.istage2_mmu.stage2_tlb.perms_faults 0 |
| system.cpu.istage2_mmu.stage2_tlb.read_accesses 0 |
| system.cpu.istage2_mmu.stage2_tlb.write_accesses 0 |
| system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0 |
| system.cpu.istage2_mmu.stage2_tlb.hits 0 |
| system.cpu.istage2_mmu.stage2_tlb.misses 0 |
| system.cpu.istage2_mmu.stage2_tlb.accesses 0 |
| system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 52453000 |
| system.cpu.itb.walker.walks 0 |
| system.cpu.itb.walker.walkRequestOrigin_Requested::Data 0 |
| system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 0 |
| system.cpu.itb.walker.walkRequestOrigin_Requested::total 0 |
| system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0 |
| system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 0 |
| system.cpu.itb.walker.walkRequestOrigin_Completed::total 0 |
| system.cpu.itb.walker.walkRequestOrigin::total 0 |
| system.cpu.itb.inst_hits 0 |
| system.cpu.itb.inst_misses 0 |
| system.cpu.itb.read_hits 0 |
| system.cpu.itb.read_misses 0 |
| system.cpu.itb.write_hits 0 |
| system.cpu.itb.write_misses 0 |
| system.cpu.itb.flush_tlb 0 |
| system.cpu.itb.flush_tlb_mva 0 |
| system.cpu.itb.flush_tlb_mva_asid 0 |
| system.cpu.itb.flush_tlb_asid 0 |
| system.cpu.itb.flush_entries 0 |
| system.cpu.itb.align_faults 0 |
| system.cpu.itb.prefetch_faults 0 |
| system.cpu.itb.domain_faults 0 |
| system.cpu.itb.perms_faults 0 |
| system.cpu.itb.read_accesses 0 |
| system.cpu.itb.write_accesses 0 |
| system.cpu.itb.inst_accesses 0 |
| system.cpu.itb.hits 0 |
| system.cpu.itb.misses 0 |
| system.cpu.itb.accesses 0 |
| system.cpu.workload.numSyscalls 13 |
| system.cpu.pwrStateResidencyTicks::ON 52453000 |
| system.cpu.numCycles 52453 |
| system.cpu.numWorkItemsStarted 0 |
| system.cpu.numWorkItemsCompleted 0 |
| system.cpu.committedInsts 4988 |
| system.cpu.committedOps 5770 |
| system.cpu.num_int_alu_accesses 4977 |
| system.cpu.num_fp_alu_accesses 16 |
| system.cpu.num_func_calls 215 |
| system.cpu.num_conditional_control_insts 800 |
| system.cpu.num_int_insts 4977 |
| system.cpu.num_fp_insts 16 |
| system.cpu.num_int_register_reads 8049 |
| system.cpu.num_int_register_writes 2992 |
| system.cpu.num_fp_register_reads 16 |
| system.cpu.num_fp_register_writes 0 |
| system.cpu.num_cc_register_reads 20681 |
| system.cpu.num_cc_register_writes 2647 |
| system.cpu.num_mem_refs 2035 |
| system.cpu.num_load_insts 1085 |
| system.cpu.num_store_insts 950 |
| system.cpu.num_idle_cycles 0 |
| system.cpu.num_busy_cycles 52453 |
| system.cpu.not_idle_fraction 1 |
| system.cpu.idle_fraction 0 |
| system.cpu.Branches 1107 |
| system.cpu.op_class::No_OpClass 0 0.00% 0.00% |
| system.cpu.op_class::IntAlu 3789 64.98% 64.98% |
| system.cpu.op_class::IntMult 4 0.07% 65.05% |
| system.cpu.op_class::IntDiv 0 0.00% 65.05% |
| system.cpu.op_class::FloatAdd 0 0.00% 65.05% |
| system.cpu.op_class::FloatCmp 0 0.00% 65.05% |
| system.cpu.op_class::FloatCvt 0 0.00% 65.05% |
| system.cpu.op_class::FloatMult 0 0.00% 65.05% |
| system.cpu.op_class::FloatMultAcc 0 0.00% 65.05% |
| system.cpu.op_class::FloatDiv 0 0.00% 65.05% |
| system.cpu.op_class::FloatMisc 0 0.00% 65.05% |
| system.cpu.op_class::FloatSqrt 0 0.00% 65.05% |
| system.cpu.op_class::SimdAdd 0 0.00% 65.05% |
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| system.l2cache.ReadSharedReq_mshr_misses::cpu.data 83 |
| system.l2cache.ReadSharedReq_mshr_misses::total 308 |
| system.l2cache.demand_mshr_misses::cpu.inst 225 |
| system.l2cache.demand_mshr_misses::cpu.data 126 |
| system.l2cache.demand_mshr_misses::total 351 |
| system.l2cache.overall_mshr_misses::cpu.inst 225 |
| system.l2cache.overall_mshr_misses::cpu.data 126 |
| system.l2cache.overall_mshr_misses::total 351 |
| system.l2cache.ReadExReq_mshr_miss_latency::cpu.data 3577000 |
| system.l2cache.ReadExReq_mshr_miss_latency::total 3577000 |
| system.l2cache.ReadSharedReq_mshr_miss_latency::cpu.inst 19183000 |
| system.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 6554000 |
| system.l2cache.ReadSharedReq_mshr_miss_latency::total 25737000 |
| system.l2cache.demand_mshr_miss_latency::cpu.inst 19183000 |
| system.l2cache.demand_mshr_miss_latency::cpu.data 10131000 |
| system.l2cache.demand_mshr_miss_latency::total 29314000 |
| system.l2cache.overall_mshr_miss_latency::cpu.inst 19183000 |
| system.l2cache.overall_mshr_miss_latency::cpu.data 10131000 |
| system.l2cache.overall_mshr_miss_latency::total 29314000 |
| system.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1 |
| system.l2cache.ReadExReq_mshr_miss_rate::total 1 |
| system.l2cache.ReadSharedReq_mshr_miss_rate::cpu.inst 0.903614 |
| system.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 0.838384 |
| system.l2cache.ReadSharedReq_mshr_miss_rate::total 0.885057 |
| system.l2cache.demand_mshr_miss_rate::cpu.inst 0.903614 |
| system.l2cache.demand_mshr_miss_rate::cpu.data 0.887324 |
| system.l2cache.demand_mshr_miss_rate::total 0.897698 |
| system.l2cache.overall_mshr_miss_rate::cpu.inst 0.903614 |
| system.l2cache.overall_mshr_miss_rate::cpu.data 0.887324 |
| system.l2cache.overall_mshr_miss_rate::total 0.897698 |
| system.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 83186.046512 |
| system.l2cache.ReadExReq_avg_mshr_miss_latency::total 83186.046512 |
| system.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.inst 85257.777778 |
| system.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 78963.855422 |
| system.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 83561.688312 |
| system.l2cache.demand_avg_mshr_miss_latency::cpu.inst 85257.777778 |
| system.l2cache.demand_avg_mshr_miss_latency::cpu.data 80404.761905 |
| system.l2cache.demand_avg_mshr_miss_latency::total 83515.669516 |
| system.l2cache.overall_avg_mshr_miss_latency::cpu.inst 85257.777778 |
| system.l2cache.overall_avg_mshr_miss_latency::cpu.data 80404.761905 |
| system.l2cache.overall_avg_mshr_miss_latency::total 83515.669516 |
| system.membus.snoop_filter.tot_requests 351 |
| system.membus.snoop_filter.hit_single_requests 0 |
| system.membus.snoop_filter.hit_multi_requests 0 |
| system.membus.snoop_filter.tot_snoops 0 |
| system.membus.snoop_filter.hit_single_snoops 0 |
| system.membus.snoop_filter.hit_multi_snoops 0 |
| system.membus.pwrStateResidencyTicks::UNDEFINED 52453000 |
| system.membus.trans_dist::ReadResp 308 |
| system.membus.trans_dist::ReadExReq 43 |
| system.membus.trans_dist::ReadExResp 43 |
| system.membus.trans_dist::ReadSharedReq 308 |
| system.membus.pkt_count_system.l2cache.mem_side::system.mem_ctrl.port 702 |
| system.membus.pkt_count::total 702 |
| system.membus.pkt_size_system.l2cache.mem_side::system.mem_ctrl.port 22464 |
| system.membus.pkt_size::total 22464 |
| system.membus.snoops 0 |
| system.membus.snoopTraffic 0 |
| system.membus.snoop_fanout::samples 351 |
| system.membus.snoop_fanout::mean 0 |
| system.membus.snoop_fanout::stdev 0 |
| system.membus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.membus.snoop_fanout::0 351 100.00% 100.00% |
| system.membus.snoop_fanout::1 0 0.00% 100.00% |
| system.membus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.membus.snoop_fanout::min_value 0 |
| system.membus.snoop_fanout::max_value 0 |
| system.membus.snoop_fanout::total 351 |
| system.membus.reqLayer0.occupancy 351000 |
| system.membus.reqLayer0.utilization 0.7 |
| system.membus.respLayer0.occupancy 1866250 |
| system.membus.respLayer0.utilization 3.6 |
| |
| ---------- End Simulation Statistics ---------- |
