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gem5
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amd
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gem5
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32ffafe2f4bff69a780eb9062491daae3638a544
/
.
/
src
/
mem
/
protocol
/
MOESI_AMD_Base.slicc
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protocol
"MOESI_AMD_Base"
;
include
"RubySlicc_interfaces.slicc"
;
include
"MOESI_AMD_Base-msg.sm"
;
include
"MOESI_AMD_Base-CorePair.sm"
;
include
"MOESI_AMD_Base-L3cache.sm"
;
include
"MOESI_AMD_Base-dir.sm"
;