commit 862a454677a79360c265126de0c5b7adb8672a8f
author Brandon Potter <brandon.potter@amd.com> Fri Feb 16 13:06:28 2018 -0500
committer Anthony Gutierrez <anthony.gutierrez@amd.com> Fri Apr 13 20:49:27 2018 +0000
tree 7e312c8666b3e7910cb9ac7100305ac7a76616a7
parent 77ef8ba4216ad950b8706cb69e714122f2982629

ruby: bugfix for MESI_Three_Level protocol

Since a3177645, the MESI_Three_Level protocol does not build. This
changeset addresses the problem by adding the L0Cache machine type
to the static machine type declaration in Ruby's export file.

Change-Id: I6327547fcb34595619caeb73932c0032f5f65c9f
Reviewed-on: https://gem5-review.googlesource.com/8383
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

src/mem/protocol/RubySlicc_Exports.sm

diff --git a/src/mem/protocol/RubySlicc_Exports.sm b/src/mem/protocol/RubySlicc_Exports.sm
index 1beb3f2..8e17f98 100644
--- a/src/mem/protocol/RubySlicc_Exports.sm
+++ b/src/mem/protocol/RubySlicc_Exports.sm
@@ -218,6 +218,7 @@
 // you cannot use anything other than the ones defined here.  Also, a protocol
 // can have only one state machine for a given type.
 enumeration(MachineType, desc="...", default="MachineType_NULL") {
+    L0Cache,     desc="L0 Cache Mach";
     L1Cache,     desc="L1 Cache Mach";
     L2Cache,     desc="L2 Cache Mach";
     L3Cache,     desc="L3 Cache Mach";