commit 91529294470235e6e7b3128bca6c5b8783f35529
author Nikos Nikoleris <nikos.nikoleris@arm.com> Thu May 10 11:30:21 2018 +0100
committer Nikos Nikoleris <nikos.nikoleris@arm.com> Thu May 17 14:37:40 2018 +0000
tree eaba55d651324f4ce0c663afda8ae9c201e264b7
parent d1c7d7b872a07a6c5a12e379205df21d298f044f

mem-cache: Move replacements stat to the base cache class

Change-Id: I25dbcfcddfe1c422a76eb1af3f726c1360d8d110
Reviewed-on: https://gem5-review.googlesource.com/10426
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>

src/mem/cache/base.cc

diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index 2c7d9fb..8143acd 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -758,4 +758,8 @@
         overallAvgMshrUncacheableLatency.subname(i, system->getMasterName(i));
     }
 
+    replacements
+        .name(name() + ".replacements")
+        .desc("number of replacements")
+        ;
 }

src/mem/cache/base.hh

diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index b006d4b..69c4818 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -453,6 +453,9 @@
     /** The average overall latency of an MSHR miss. */
     Stats::Formula overallAvgMshrUncacheableLatency;
 
+    /** Number of replacements of valid blocks. */
+    Stats::Scalar replacements;
+
     /**
      * @}
      */

src/mem/cache/cache.cc

diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc
index b9625be..73c7e19 100644
--- a/src/mem/cache/cache.cc
+++ b/src/mem/cache/cache.cc
@@ -1827,6 +1827,7 @@
             } else {
                 writebacks.push_back(cleanEvictBlk(blk));
             }
+            replacements++;
         }
     }
 

src/mem/cache/tags/base.cc

diff --git a/src/mem/cache/tags/base.cc b/src/mem/cache/tags/base.cc
index 1d6ed46..75d117e 100644
--- a/src/mem/cache/tags/base.cc
+++ b/src/mem/cache/tags/base.cc
@@ -48,7 +48,6 @@
 
 #include "mem/cache/tags/base.hh"
 
-#include "cpu/smt.hh" //maxThreadsPerCPU
 #include "mem/cache/base.hh"
 #include "sim/sim_exit.hh"
 
@@ -92,7 +91,6 @@
     // found block might not actually be replaced there if the
     // coherence protocol says it can't be.
     if (blk->isValid()) {
-        replacements[0]++;
         totalRefs += blk->refCount;
         ++sampledRefs;
 
@@ -125,13 +123,6 @@
 
     using namespace Stats;
 
-    replacements
-        .init(maxThreadsPerCPU)
-        .name(name() + ".replacements")
-        .desc("number of replacements")
-        .flags(total)
-        ;
-
     tagsInUse
         .name(name() + ".tagsinuse")
         .desc("Cycle average of tags in use")

src/mem/cache/tags/base.hh

diff --git a/src/mem/cache/tags/base.hh b/src/mem/cache/tags/base.hh
index 4cf6774..c04329f 100644
--- a/src/mem/cache/tags/base.hh
+++ b/src/mem/cache/tags/base.hh
@@ -104,8 +104,6 @@
      * @{
      */
 
-    /** Number of replacements of valid blocks per thread. */
-    Stats::Vector replacements;
     /** Per cycle average of the number of tags that hold valid data. */
     Stats::Average tagsInUse;