commit 96554eca9f7731f6f5e56f9f29c933e230e34bd8
author Giacomo Travaglini <giacomo.travaglini@arm.com> Tue May 29 22:09:39 2018 +0100
committer Giacomo Travaglini <giacomo.travaglini@arm.com> Thu Jun 14 13:45:49 2018 +0000
tree 7f28fa6058ae42819e812f01329ec8836ad60d7f
parent fe8faa62b74087febe227f69385db3e562682799

arch-arm: Adapting IllegalExecution fault for AArch32

The Illegal Execution fault triggered by the setting of processor state
PSTATE.IL happens in AArch32 as well and takes the form of UNDEFINED
exception fault.  We are hence copying the UndefinedInstruction AArch32
fields into the IllegalInstSetStateFault.

Change-Id: Ibb7424397c2030ea5d010577c530277a27036aea
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10814
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

src/arch/arm/faults.cc

diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index dd4f958..cf58960 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -257,6 +257,10 @@
     "Virtual FIQ",           0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ,
     4, 4, 0, 0, false, true,  true,  EC_INVALID
 );
+template<> ArmFault::FaultVals ArmFaultVals<IllegalInstSetStateFault>::vals(
+    "Illegal Inst Set State Fault",   0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED,
+    4, 2, 0, 0, true, false, false, EC_ILLEGAL_INST
+);
 template<> ArmFault::FaultVals ArmFaultVals<SupervisorTrap>::vals(
     // Some dummy values (SupervisorTrap is AArch64-only)
     "Supervisor Trap",   0x014, 0x000, 0x200, 0x400, 0x600, MODE_SVC,
@@ -287,11 +291,6 @@
     "ArmSev Flush",          0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC,
     0, 0, 0, 0, false, true,  true,  EC_UNKNOWN
 );
-template<> ArmFault::FaultVals ArmFaultVals<IllegalInstSetStateFault>::vals(
-    // Some dummy values (SPAlignmentFault is AArch64-only)
-    "Illegal Inst Set State Fault",   0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC,
-    0, 0, 0, 0, true, false, false, EC_ILLEGAL_INST
-);
 
 Addr
 ArmFault::getVector(ThreadContext *tc)