| |
| ---------- Begin Simulation Statistics ---------- |
| sim_seconds 0.000250 |
| sim_ticks 250490500 |
| final_tick 250490500 |
| sim_freq 1000000000000 |
| host_inst_rate 3805 |
| host_op_rate 3814 |
| host_tick_rate 8705712 |
| host_mem_usage 268924 |
| host_seconds 28.77 |
| sim_insts 109485 |
| sim_ops 109730 |
| system.voltage_domain.voltage 1 |
| system.clk_domain.clock 1000 |
| system.physmem.pwrStateResidencyTicks::UNDEFINED 250490500 |
| system.physmem.bytes_read::cpu.inst 44032 |
| system.physmem.bytes_read::cpu.data 29568 |
| system.physmem.bytes_read::total 73600 |
| system.physmem.bytes_inst_read::cpu.inst 44032 |
| system.physmem.bytes_inst_read::total 44032 |
| system.physmem.num_reads::cpu.inst 688 |
| system.physmem.num_reads::cpu.data 462 |
| system.physmem.num_reads::total 1150 |
| system.physmem.bw_read::cpu.inst 175783114 |
| system.physmem.bw_read::cpu.data 118040405 |
| system.physmem.bw_read::total 293823518 |
| system.physmem.bw_inst_read::cpu.inst 175783114 |
| system.physmem.bw_inst_read::total 175783114 |
| system.physmem.bw_total::cpu.inst 175783114 |
| system.physmem.bw_total::cpu.data 118040405 |
| system.physmem.bw_total::total 293823518 |
| system.pwrStateResidencyTicks::UNDEFINED 250490500 |
| system.cpu_clk_domain.clock 500 |
| system.cpu.dtb.read_hits 0 |
| system.cpu.dtb.read_misses 0 |
| system.cpu.dtb.read_accesses 0 |
| system.cpu.dtb.write_hits 0 |
| system.cpu.dtb.write_misses 0 |
| system.cpu.dtb.write_accesses 0 |
| system.cpu.dtb.hits 0 |
| system.cpu.dtb.misses 0 |
| system.cpu.dtb.accesses 0 |
| system.cpu.itb.read_hits 0 |
| system.cpu.itb.read_misses 0 |
| system.cpu.itb.read_accesses 0 |
| system.cpu.itb.write_hits 0 |
| system.cpu.itb.write_misses 0 |
| system.cpu.itb.write_accesses 0 |
| system.cpu.itb.hits 0 |
| system.cpu.itb.misses 0 |
| system.cpu.itb.accesses 0 |
| system.cpu.workload.numSyscalls 43 |
| system.cpu.pwrStateResidencyTicks::ON 250490500 |
| system.cpu.numCycles 500981 |
| system.cpu.numWorkItemsStarted 0 |
| system.cpu.numWorkItemsCompleted 0 |
| system.cpu.committedInsts 109485 |
| system.cpu.committedOps 109730 |
| system.cpu.num_int_alu_accesses 109164 |
| system.cpu.num_fp_alu_accesses 12 |
| system.cpu.num_vec_alu_accesses 0 |
| system.cpu.num_func_calls 6221 |
| system.cpu.num_conditional_control_insts 18218 |
| system.cpu.num_int_insts 109164 |
| system.cpu.num_fp_insts 12 |
| system.cpu.num_vec_insts 0 |
| system.cpu.num_int_register_reads 137211 |
| system.cpu.num_int_register_writes 72083 |
| system.cpu.num_fp_register_reads 12 |
| system.cpu.num_fp_register_writes 0 |
| system.cpu.num_vec_register_reads 0 |
| system.cpu.num_vec_register_writes 0 |
| system.cpu.num_mem_refs 42276 |
| system.cpu.num_load_insts 25597 |
| system.cpu.num_store_insts 16679 |
| system.cpu.num_idle_cycles 0 |
| system.cpu.num_busy_cycles 500981 |
| system.cpu.not_idle_fraction 1 |
| system.cpu.idle_fraction 0 |
| system.cpu.Branches 24439 |
| system.cpu.op_class::No_OpClass 47 0.04% 0.04% |
| system.cpu.op_class::IntAlu 67339 61.34% 61.39% |
| system.cpu.op_class::IntMult 107 0.10% 61.48% |
| system.cpu.op_class::IntDiv 4 0.00% 61.49% |
| system.cpu.op_class::FloatAdd 0 0.00% 61.49% |
| system.cpu.op_class::FloatCmp 0 0.00% 61.49% |
| system.cpu.op_class::FloatCvt 0 0.00% 61.49% |
| system.cpu.op_class::FloatMult 0 0.00% 61.49% |
| system.cpu.op_class::FloatMultAcc 0 0.00% 61.49% |
| system.cpu.op_class::FloatDiv 0 0.00% 61.49% |
| system.cpu.op_class::FloatMisc 0 0.00% 61.49% |
| system.cpu.op_class::FloatSqrt 0 0.00% 61.49% |
| system.cpu.op_class::SimdAdd 0 0.00% 61.49% |
| system.cpu.op_class::SimdAddAcc 0 0.00% 61.49% |
| system.cpu.op_class::SimdAlu 0 0.00% 61.49% |
| system.cpu.op_class::SimdCmp 0 0.00% 61.49% |
| system.cpu.op_class::SimdCvt 0 0.00% 61.49% |
| system.cpu.op_class::SimdMisc 0 0.00% 61.49% |
| system.cpu.op_class::SimdMult 0 0.00% 61.49% |
| system.cpu.op_class::SimdMultAcc 0 0.00% 61.49% |
| system.cpu.op_class::SimdShift 0 0.00% 61.49% |
| system.cpu.op_class::SimdShiftAcc 0 0.00% 61.49% |
| system.cpu.op_class::SimdSqrt 0 0.00% 61.49% |
| system.cpu.op_class::SimdFloatAdd 0 0.00% 61.49% |
| system.cpu.op_class::SimdFloatAlu 0 0.00% 61.49% |
| system.cpu.op_class::SimdFloatCmp 0 0.00% 61.49% |
| system.cpu.op_class::SimdFloatCvt 0 0.00% 61.49% |
| system.cpu.op_class::SimdFloatDiv 0 0.00% 61.49% |
| system.cpu.op_class::SimdFloatMisc 0 0.00% 61.49% |
| system.cpu.op_class::SimdFloatMult 0 0.00% 61.49% |
| system.cpu.op_class::SimdFloatMultAcc 0 0.00% 61.49% |
| system.cpu.op_class::SimdFloatSqrt 0 0.00% 61.49% |
| system.cpu.op_class::MemRead 25597 23.32% 84.81% |
| system.cpu.op_class::MemWrite 16667 15.18% 99.99% |
| system.cpu.op_class::FloatMemRead 0 0.00% 99.99% |
| system.cpu.op_class::FloatMemWrite 12 0.01% 100.00% |
| system.cpu.op_class::IprAccess 0 0.00% 100.00% |
| system.cpu.op_class::InstPrefetch 0 0.00% 100.00% |
| system.cpu.op_class::total 109773 |
| system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 250490500 |
| system.cpu.dcache.tags.replacements 0 |
| system.cpu.dcache.tags.tagsinuse 331.433935 |
| system.cpu.dcache.tags.total_refs 41812 |
| system.cpu.dcache.tags.sampled_refs 462 |
| system.cpu.dcache.tags.avg_refs 90.502165 |
| system.cpu.dcache.tags.warmup_cycle 0 |
| system.cpu.dcache.tags.occ_blocks::cpu.data 331.433935 |
| system.cpu.dcache.tags.occ_percent::cpu.data 0.080916 |
| system.cpu.dcache.tags.occ_percent::total 0.080916 |
| system.cpu.dcache.tags.occ_task_id_blocks::1024 462 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::0 15 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::1 12 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::2 435 |
| system.cpu.dcache.tags.occ_task_id_percent::1024 0.112793 |
| system.cpu.dcache.tags.tag_accesses 85010 |
| system.cpu.dcache.tags.data_accesses 85010 |
| system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 250490500 |
| system.cpu.dcache.ReadReq_hits::cpu.data 25087 |
| system.cpu.dcache.ReadReq_hits::total 25087 |
| system.cpu.dcache.WriteReq_hits::cpu.data 16174 |
| system.cpu.dcache.WriteReq_hits::total 16174 |
| system.cpu.dcache.LoadLockedReq_hits::cpu.data 275 |
| system.cpu.dcache.LoadLockedReq_hits::total 275 |
| system.cpu.dcache.StoreCondReq_hits::cpu.data 276 |
| system.cpu.dcache.StoreCondReq_hits::total 276 |
| system.cpu.dcache.demand_hits::cpu.data 41261 |
| system.cpu.dcache.demand_hits::total 41261 |
| system.cpu.dcache.overall_hits::cpu.data 41261 |
| system.cpu.dcache.overall_hits::total 41261 |
| system.cpu.dcache.ReadReq_misses::cpu.data 234 |
| system.cpu.dcache.ReadReq_misses::total 234 |
| system.cpu.dcache.WriteReq_misses::cpu.data 227 |
| system.cpu.dcache.WriteReq_misses::total 227 |
| system.cpu.dcache.LoadLockedReq_misses::cpu.data 1 |
| system.cpu.dcache.LoadLockedReq_misses::total 1 |
| system.cpu.dcache.demand_misses::cpu.data 461 |
| system.cpu.dcache.demand_misses::total 461 |
| system.cpu.dcache.overall_misses::cpu.data 461 |
| system.cpu.dcache.overall_misses::total 461 |
| system.cpu.dcache.ReadReq_miss_latency::cpu.data 14742000 |
| system.cpu.dcache.ReadReq_miss_latency::total 14742000 |
| system.cpu.dcache.WriteReq_miss_latency::cpu.data 14301000 |
| system.cpu.dcache.WriteReq_miss_latency::total 14301000 |
| system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data 63000 |
| system.cpu.dcache.LoadLockedReq_miss_latency::total 63000 |
| system.cpu.dcache.demand_miss_latency::cpu.data 29043000 |
| system.cpu.dcache.demand_miss_latency::total 29043000 |
| system.cpu.dcache.overall_miss_latency::cpu.data 29043000 |
| system.cpu.dcache.overall_miss_latency::total 29043000 |
| system.cpu.dcache.ReadReq_accesses::cpu.data 25321 |
| system.cpu.dcache.ReadReq_accesses::total 25321 |
| system.cpu.dcache.WriteReq_accesses::cpu.data 16401 |
| system.cpu.dcache.WriteReq_accesses::total 16401 |
| system.cpu.dcache.LoadLockedReq_accesses::cpu.data 276 |
| system.cpu.dcache.LoadLockedReq_accesses::total 276 |
| system.cpu.dcache.StoreCondReq_accesses::cpu.data 276 |
| system.cpu.dcache.StoreCondReq_accesses::total 276 |
| system.cpu.dcache.demand_accesses::cpu.data 41722 |
| system.cpu.dcache.demand_accesses::total 41722 |
| system.cpu.dcache.overall_accesses::cpu.data 41722 |
| system.cpu.dcache.overall_accesses::total 41722 |
| system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.009241 |
| system.cpu.dcache.ReadReq_miss_rate::total 0.009241 |
| system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.013841 |
| system.cpu.dcache.WriteReq_miss_rate::total 0.013841 |
| system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.003623 |
| system.cpu.dcache.LoadLockedReq_miss_rate::total 0.003623 |
| system.cpu.dcache.demand_miss_rate::cpu.data 0.011049 |
| system.cpu.dcache.demand_miss_rate::total 0.011049 |
| system.cpu.dcache.overall_miss_rate::cpu.data 0.011049 |
| system.cpu.dcache.overall_miss_rate::total 0.011049 |
| system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.ReadReq_avg_miss_latency::total 63000 |
| system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.WriteReq_avg_miss_latency::total 63000 |
| system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 63000 |
| system.cpu.dcache.demand_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.demand_avg_miss_latency::total 63000 |
| system.cpu.dcache.overall_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.overall_avg_miss_latency::total 63000 |
| system.cpu.dcache.blocked_cycles::no_mshrs 0 |
| system.cpu.dcache.blocked_cycles::no_targets 0 |
| system.cpu.dcache.blocked::no_mshrs 0 |
| system.cpu.dcache.blocked::no_targets 0 |
| system.cpu.dcache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.dcache.avg_blocked_cycles::no_targets nan |
| system.cpu.dcache.ReadReq_mshr_misses::cpu.data 234 |
| system.cpu.dcache.ReadReq_mshr_misses::total 234 |
| system.cpu.dcache.WriteReq_mshr_misses::cpu.data 227 |
| system.cpu.dcache.WriteReq_mshr_misses::total 227 |
| system.cpu.dcache.LoadLockedReq_mshr_misses::cpu.data 1 |
| system.cpu.dcache.LoadLockedReq_mshr_misses::total 1 |
| system.cpu.dcache.demand_mshr_misses::cpu.data 461 |
| system.cpu.dcache.demand_mshr_misses::total 461 |
| system.cpu.dcache.overall_mshr_misses::cpu.data 461 |
| system.cpu.dcache.overall_mshr_misses::total 461 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 14508000 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::total 14508000 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 14074000 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::total 14074000 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_latency::total 62000 |
| system.cpu.dcache.demand_mshr_miss_latency::cpu.data 28582000 |
| system.cpu.dcache.demand_mshr_miss_latency::total 28582000 |
| system.cpu.dcache.overall_mshr_miss_latency::cpu.data 28582000 |
| system.cpu.dcache.overall_mshr_miss_latency::total 28582000 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.009241 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.009241 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.013841 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.013841 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data 0.003623 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total 0.003623 |
| system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.011049 |
| system.cpu.dcache.demand_mshr_miss_rate::total 0.011049 |
| system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.011049 |
| system.cpu.dcache.overall_mshr_miss_rate::total 0.011049 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::total 62000 |
| system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 250490500 |
| system.cpu.icache.tags.replacements 38 |
| system.cpu.icache.tags.tagsinuse 405.514390 |
| system.cpu.icache.tags.total_refs 136215 |
| system.cpu.icache.tags.sampled_refs 689 |
| system.cpu.icache.tags.avg_refs 197.699565 |
| system.cpu.icache.tags.warmup_cycle 0 |
| system.cpu.icache.tags.occ_blocks::cpu.inst 405.514390 |
| system.cpu.icache.tags.occ_percent::cpu.inst 0.198005 |
| system.cpu.icache.tags.occ_percent::total 0.198005 |
| system.cpu.icache.tags.occ_task_id_blocks::1024 651 |
| system.cpu.icache.tags.age_task_id_blocks_1024::0 42 |
| system.cpu.icache.tags.age_task_id_blocks_1024::1 84 |
| system.cpu.icache.tags.age_task_id_blocks_1024::2 525 |
| system.cpu.icache.tags.occ_task_id_percent::1024 0.317871 |
| system.cpu.icache.tags.tag_accesses 274497 |
| system.cpu.icache.tags.data_accesses 274497 |
| system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 250490500 |
| system.cpu.icache.ReadReq_hits::cpu.inst 136215 |
| system.cpu.icache.ReadReq_hits::total 136215 |
| system.cpu.icache.demand_hits::cpu.inst 136215 |
| system.cpu.icache.demand_hits::total 136215 |
| system.cpu.icache.overall_hits::cpu.inst 136215 |
| system.cpu.icache.overall_hits::total 136215 |
| system.cpu.icache.ReadReq_misses::cpu.inst 689 |
| system.cpu.icache.ReadReq_misses::total 689 |
| system.cpu.icache.demand_misses::cpu.inst 689 |
| system.cpu.icache.demand_misses::total 689 |
| system.cpu.icache.overall_misses::cpu.inst 689 |
| system.cpu.icache.overall_misses::total 689 |
| system.cpu.icache.ReadReq_miss_latency::cpu.inst 43358500 |
| system.cpu.icache.ReadReq_miss_latency::total 43358500 |
| system.cpu.icache.demand_miss_latency::cpu.inst 43358500 |
| system.cpu.icache.demand_miss_latency::total 43358500 |
| system.cpu.icache.overall_miss_latency::cpu.inst 43358500 |
| system.cpu.icache.overall_miss_latency::total 43358500 |
| system.cpu.icache.ReadReq_accesses::cpu.inst 136904 |
| system.cpu.icache.ReadReq_accesses::total 136904 |
| system.cpu.icache.demand_accesses::cpu.inst 136904 |
| system.cpu.icache.demand_accesses::total 136904 |
| system.cpu.icache.overall_accesses::cpu.inst 136904 |
| system.cpu.icache.overall_accesses::total 136904 |
| system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.005033 |
| system.cpu.icache.ReadReq_miss_rate::total 0.005033 |
| system.cpu.icache.demand_miss_rate::cpu.inst 0.005033 |
| system.cpu.icache.demand_miss_rate::total 0.005033 |
| system.cpu.icache.overall_miss_rate::cpu.inst 0.005033 |
| system.cpu.icache.overall_miss_rate::total 0.005033 |
| system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 62929.608128 |
| system.cpu.icache.ReadReq_avg_miss_latency::total 62929.608128 |
| system.cpu.icache.demand_avg_miss_latency::cpu.inst 62929.608128 |
| system.cpu.icache.demand_avg_miss_latency::total 62929.608128 |
| system.cpu.icache.overall_avg_miss_latency::cpu.inst 62929.608128 |
| system.cpu.icache.overall_avg_miss_latency::total 62929.608128 |
| system.cpu.icache.blocked_cycles::no_mshrs 0 |
| system.cpu.icache.blocked_cycles::no_targets 0 |
| system.cpu.icache.blocked::no_mshrs 0 |
| system.cpu.icache.blocked::no_targets 0 |
| system.cpu.icache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.icache.avg_blocked_cycles::no_targets nan |
| system.cpu.icache.writebacks::writebacks 38 |
| system.cpu.icache.writebacks::total 38 |
| system.cpu.icache.ReadReq_mshr_misses::cpu.inst 689 |
| system.cpu.icache.ReadReq_mshr_misses::total 689 |
| system.cpu.icache.demand_mshr_misses::cpu.inst 689 |
| system.cpu.icache.demand_mshr_misses::total 689 |
| system.cpu.icache.overall_mshr_misses::cpu.inst 689 |
| system.cpu.icache.overall_mshr_misses::total 689 |
| system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 42669500 |
| system.cpu.icache.ReadReq_mshr_miss_latency::total 42669500 |
| system.cpu.icache.demand_mshr_miss_latency::cpu.inst 42669500 |
| system.cpu.icache.demand_mshr_miss_latency::total 42669500 |
| system.cpu.icache.overall_mshr_miss_latency::cpu.inst 42669500 |
| system.cpu.icache.overall_mshr_miss_latency::total 42669500 |
| system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.005033 |
| system.cpu.icache.ReadReq_mshr_miss_rate::total 0.005033 |
| system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.005033 |
| system.cpu.icache.demand_mshr_miss_rate::total 0.005033 |
| system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.005033 |
| system.cpu.icache.overall_mshr_miss_rate::total 0.005033 |
| system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 61929.608128 |
| system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 61929.608128 |
| system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 61929.608128 |
| system.cpu.icache.demand_avg_mshr_miss_latency::total 61929.608128 |
| system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 61929.608128 |
| system.cpu.icache.overall_avg_mshr_miss_latency::total 61929.608128 |
| system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 250490500 |
| system.cpu.l2cache.tags.replacements 0 |
| system.cpu.l2cache.tags.tagsinuse 754.074272 |
| system.cpu.l2cache.tags.total_refs 39 |
| system.cpu.l2cache.tags.sampled_refs 1150 |
| system.cpu.l2cache.tags.avg_refs 0.033913 |
| system.cpu.l2cache.tags.warmup_cycle 0 |
| system.cpu.l2cache.tags.occ_blocks::cpu.inst 422.620971 |
| system.cpu.l2cache.tags.occ_blocks::cpu.data 331.453301 |
| system.cpu.l2cache.tags.occ_percent::cpu.inst 0.012897 |
| system.cpu.l2cache.tags.occ_percent::cpu.data 0.010115 |
| system.cpu.l2cache.tags.occ_percent::total 0.023013 |
| system.cpu.l2cache.tags.occ_task_id_blocks::1024 1150 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::0 57 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::1 96 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::2 997 |
| system.cpu.l2cache.tags.occ_task_id_percent::1024 0.035095 |
| system.cpu.l2cache.tags.tag_accesses 10662 |
| system.cpu.l2cache.tags.data_accesses 10662 |
| system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 250490500 |
| system.cpu.l2cache.WritebackClean_hits::writebacks 38 |
| system.cpu.l2cache.WritebackClean_hits::total 38 |
| system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 1 |
| system.cpu.l2cache.ReadCleanReq_hits::total 1 |
| system.cpu.l2cache.demand_hits::cpu.inst 1 |
| system.cpu.l2cache.demand_hits::total 1 |
| system.cpu.l2cache.overall_hits::cpu.inst 1 |
| system.cpu.l2cache.overall_hits::total 1 |
| system.cpu.l2cache.ReadExReq_misses::cpu.data 227 |
| system.cpu.l2cache.ReadExReq_misses::total 227 |
| system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 688 |
| system.cpu.l2cache.ReadCleanReq_misses::total 688 |
| system.cpu.l2cache.ReadSharedReq_misses::cpu.data 235 |
| system.cpu.l2cache.ReadSharedReq_misses::total 235 |
| system.cpu.l2cache.demand_misses::cpu.inst 688 |
| system.cpu.l2cache.demand_misses::cpu.data 462 |
| system.cpu.l2cache.demand_misses::total 1150 |
| system.cpu.l2cache.overall_misses::cpu.inst 688 |
| system.cpu.l2cache.overall_misses::cpu.data 462 |
| system.cpu.l2cache.overall_misses::total 1150 |
| system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 13733500 |
| system.cpu.l2cache.ReadExReq_miss_latency::total 13733500 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst 41625000 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::total 41625000 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data 14217500 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::total 14217500 |
| system.cpu.l2cache.demand_miss_latency::cpu.inst 41625000 |
| system.cpu.l2cache.demand_miss_latency::cpu.data 27951000 |
| system.cpu.l2cache.demand_miss_latency::total 69576000 |
| system.cpu.l2cache.overall_miss_latency::cpu.inst 41625000 |
| system.cpu.l2cache.overall_miss_latency::cpu.data 27951000 |
| system.cpu.l2cache.overall_miss_latency::total 69576000 |
| system.cpu.l2cache.WritebackClean_accesses::writebacks 38 |
| system.cpu.l2cache.WritebackClean_accesses::total 38 |
| system.cpu.l2cache.ReadExReq_accesses::cpu.data 227 |
| system.cpu.l2cache.ReadExReq_accesses::total 227 |
| system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 689 |
| system.cpu.l2cache.ReadCleanReq_accesses::total 689 |
| system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 235 |
| system.cpu.l2cache.ReadSharedReq_accesses::total 235 |
| system.cpu.l2cache.demand_accesses::cpu.inst 689 |
| system.cpu.l2cache.demand_accesses::cpu.data 462 |
| system.cpu.l2cache.demand_accesses::total 1151 |
| system.cpu.l2cache.overall_accesses::cpu.inst 689 |
| system.cpu.l2cache.overall_accesses::cpu.data 462 |
| system.cpu.l2cache.overall_accesses::total 1151 |
| system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadExReq_miss_rate::total 1 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.998549 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.998549 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::total 1 |
| system.cpu.l2cache.demand_miss_rate::cpu.inst 0.998549 |
| system.cpu.l2cache.demand_miss_rate::cpu.data 1 |
| system.cpu.l2cache.demand_miss_rate::total 0.999131 |
| system.cpu.l2cache.overall_miss_rate::cpu.inst 0.998549 |
| system.cpu.l2cache.overall_miss_rate::cpu.data 1 |
| system.cpu.l2cache.overall_miss_rate::total 0.999131 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::total 60500 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 60501.453488 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 60501.453488 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 60500 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 60501.453488 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.demand_avg_miss_latency::total 60500.869565 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 60501.453488 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.overall_avg_miss_latency::total 60500.869565 |
| system.cpu.l2cache.blocked_cycles::no_mshrs 0 |
| system.cpu.l2cache.blocked_cycles::no_targets 0 |
| system.cpu.l2cache.blocked::no_mshrs 0 |
| system.cpu.l2cache.blocked::no_targets 0 |
| system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.l2cache.avg_blocked_cycles::no_targets nan |
| system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 227 |
| system.cpu.l2cache.ReadExReq_mshr_misses::total 227 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst 688 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::total 688 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data 235 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::total 235 |
| system.cpu.l2cache.demand_mshr_misses::cpu.inst 688 |
| system.cpu.l2cache.demand_mshr_misses::cpu.data 462 |
| system.cpu.l2cache.demand_mshr_misses::total 1150 |
| system.cpu.l2cache.overall_mshr_misses::cpu.inst 688 |
| system.cpu.l2cache.overall_mshr_misses::cpu.data 462 |
| system.cpu.l2cache.overall_mshr_misses::total 1150 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 11463500 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 11463500 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 34745000 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 34745000 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 11867500 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 11867500 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 34745000 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 23331000 |
| system.cpu.l2cache.demand_mshr_miss_latency::total 58076000 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 34745000 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 23331000 |
| system.cpu.l2cache.overall_mshr_miss_latency::total 58076000 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.998549 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.998549 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 1 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.998549 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.demand_mshr_miss_rate::total 0.999131 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.998549 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.overall_mshr_miss_rate::total 0.999131 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 50500 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50501.453488 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50501.453488 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 50500 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50501.453488 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50500.869565 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50501.453488 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50500.869565 |
| system.cpu.toL2Bus.snoop_filter.tot_requests 1189 |
| system.cpu.toL2Bus.snoop_filter.hit_single_requests 38 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 |
| system.cpu.toL2Bus.snoop_filter.tot_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 |
| system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 250490500 |
| system.cpu.toL2Bus.trans_dist::ReadResp 924 |
| system.cpu.toL2Bus.trans_dist::WritebackClean 38 |
| system.cpu.toL2Bus.trans_dist::ReadExReq 227 |
| system.cpu.toL2Bus.trans_dist::ReadExResp 227 |
| system.cpu.toL2Bus.trans_dist::ReadCleanReq 689 |
| system.cpu.toL2Bus.trans_dist::ReadSharedReq 235 |
| system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1416 |
| system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 924 |
| system.cpu.toL2Bus.pkt_count::total 2340 |
| system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 46528 |
| system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 29568 |
| system.cpu.toL2Bus.pkt_size::total 76096 |
| system.cpu.toL2Bus.snoops 0 |
| system.cpu.toL2Bus.snoopTraffic 0 |
| system.cpu.toL2Bus.snoop_fanout::samples 1151 |
| system.cpu.toL2Bus.snoop_fanout::mean 0 |
| system.cpu.toL2Bus.snoop_fanout::stdev 0 |
| system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.cpu.toL2Bus.snoop_fanout::0 1151 100.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::min_value 0 |
| system.cpu.toL2Bus.snoop_fanout::max_value 0 |
| system.cpu.toL2Bus.snoop_fanout::total 1151 |
| system.cpu.toL2Bus.reqLayer0.occupancy 632500 |
| system.cpu.toL2Bus.reqLayer0.utilization 0.3 |
| system.cpu.toL2Bus.respLayer0.occupancy 1033500 |
| system.cpu.toL2Bus.respLayer0.utilization 0.4 |
| system.cpu.toL2Bus.respLayer1.occupancy 693000 |
| system.cpu.toL2Bus.respLayer1.utilization 0.3 |
| system.membus.snoop_filter.tot_requests 1150 |
| system.membus.snoop_filter.hit_single_requests 0 |
| system.membus.snoop_filter.hit_multi_requests 0 |
| system.membus.snoop_filter.tot_snoops 0 |
| system.membus.snoop_filter.hit_single_snoops 0 |
| system.membus.snoop_filter.hit_multi_snoops 0 |
| system.membus.pwrStateResidencyTicks::UNDEFINED 250490500 |
| system.membus.trans_dist::ReadResp 923 |
| system.membus.trans_dist::ReadExReq 227 |
| system.membus.trans_dist::ReadExResp 227 |
| system.membus.trans_dist::ReadSharedReq 923 |
| system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 2300 |
| system.membus.pkt_count::total 2300 |
| system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 73600 |
| system.membus.pkt_size::total 73600 |
| system.membus.snoops 0 |
| system.membus.snoopTraffic 0 |
| system.membus.snoop_fanout::samples 1150 |
| system.membus.snoop_fanout::mean 0 |
| system.membus.snoop_fanout::stdev 0 |
| system.membus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.membus.snoop_fanout::0 1150 100.00% 100.00% |
| system.membus.snoop_fanout::1 0 0.00% 100.00% |
| system.membus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.membus.snoop_fanout::min_value 0 |
| system.membus.snoop_fanout::max_value 0 |
| system.membus.snoop_fanout::total 1150 |
| system.membus.reqLayer0.occupancy 1151000 |
| system.membus.reqLayer0.utilization 0.5 |
| system.membus.respLayer1.occupancy 5750000 |
| system.membus.respLayer1.utilization 2.3 |
| |
| ---------- End Simulation Statistics ---------- |
