| |
| ---------- Begin Simulation Statistics ---------- |
| sim_seconds 0.000755 |
| sim_ticks 755664500 |
| final_tick 755664500 |
| sim_freq 1000000000000 |
| host_inst_rate 3560 |
| host_op_rate 3571 |
| host_tick_rate 6467277 |
| host_mem_usage 270048 |
| host_seconds 116.84 |
| sim_insts 416024 |
| sim_ops 417277 |
| system.voltage_domain.voltage 1 |
| system.clk_domain.clock 1000 |
| system.physmem.pwrStateResidencyTicks::UNDEFINED 755664500 |
| system.physmem.bytes_read::cpu.inst 67712 |
| system.physmem.bytes_read::cpu.data 33920 |
| system.physmem.bytes_read::total 101632 |
| system.physmem.bytes_inst_read::cpu.inst 67712 |
| system.physmem.bytes_inst_read::total 67712 |
| system.physmem.num_reads::cpu.inst 1058 |
| system.physmem.num_reads::cpu.data 530 |
| system.physmem.num_reads::total 1588 |
| system.physmem.bw_read::cpu.inst 89605903 |
| system.physmem.bw_read::cpu.data 44887645 |
| system.physmem.bw_read::total 134493548 |
| system.physmem.bw_inst_read::cpu.inst 89605903 |
| system.physmem.bw_inst_read::total 89605903 |
| system.physmem.bw_total::cpu.inst 89605903 |
| system.physmem.bw_total::cpu.data 44887645 |
| system.physmem.bw_total::total 134493548 |
| system.pwrStateResidencyTicks::UNDEFINED 755664500 |
| system.cpu_clk_domain.clock 500 |
| system.cpu.dtb.read_hits 0 |
| system.cpu.dtb.read_misses 0 |
| system.cpu.dtb.read_accesses 0 |
| system.cpu.dtb.write_hits 0 |
| system.cpu.dtb.write_misses 0 |
| system.cpu.dtb.write_accesses 0 |
| system.cpu.dtb.hits 0 |
| system.cpu.dtb.misses 0 |
| system.cpu.dtb.accesses 0 |
| system.cpu.itb.read_hits 0 |
| system.cpu.itb.read_misses 0 |
| system.cpu.itb.read_accesses 0 |
| system.cpu.itb.write_hits 0 |
| system.cpu.itb.write_misses 0 |
| system.cpu.itb.write_accesses 0 |
| system.cpu.itb.hits 0 |
| system.cpu.itb.misses 0 |
| system.cpu.itb.accesses 0 |
| system.cpu.workload.numSyscalls 216 |
| system.cpu.pwrStateResidencyTicks::ON 755664500 |
| system.cpu.numCycles 1511329 |
| system.cpu.numWorkItemsStarted 0 |
| system.cpu.numWorkItemsCompleted 0 |
| system.cpu.committedInsts 416024 |
| system.cpu.committedOps 417277 |
| system.cpu.num_int_alu_accesses 415220 |
| system.cpu.num_fp_alu_accesses 1163 |
| system.cpu.num_vec_alu_accesses 0 |
| system.cpu.num_func_calls 23050 |
| system.cpu.num_conditional_control_insts 67806 |
| system.cpu.num_int_insts 415220 |
| system.cpu.num_fp_insts 1163 |
| system.cpu.num_vec_insts 0 |
| system.cpu.num_int_register_reads 525251 |
| system.cpu.num_int_register_writes 276296 |
| system.cpu.num_fp_register_reads 936 |
| system.cpu.num_fp_register_writes 756 |
| system.cpu.num_vec_register_reads 0 |
| system.cpu.num_vec_register_writes 0 |
| system.cpu.num_mem_refs 169624 |
| system.cpu.num_load_insts 105498 |
| system.cpu.num_store_insts 64126 |
| system.cpu.num_idle_cycles -0 |
| system.cpu.num_busy_cycles 1511329 |
| system.cpu.not_idle_fraction 1 |
| system.cpu.idle_fraction -0 |
| system.cpu.Branches 90856 |
| system.cpu.op_class::No_OpClass 236 0.05% 0.05% |
| system.cpu.op_class::IntAlu 245871 58.89% 58.94% |
| system.cpu.op_class::IntMult 674 0.16% 59.11% |
| system.cpu.op_class::IntDiv 644 0.15% 59.26% |
| system.cpu.op_class::FloatAdd 128 0.03% 59.29% |
| system.cpu.op_class::FloatCmp 161 0.03% 59.33% |
| system.cpu.op_class::FloatCvt 109 0.02% 59.35% |
| system.cpu.op_class::FloatMult 30 0.00% 59.36% |
| system.cpu.op_class::FloatMultAcc 0 0.00% 59.36% |
| system.cpu.op_class::FloatDiv 11 0.00% 59.36% |
| system.cpu.op_class::FloatMisc 0 0.00% 59.36% |
| system.cpu.op_class::FloatSqrt 5 0.00% 59.37% |
| system.cpu.op_class::SimdAdd 0 0.00% 59.37% |
| system.cpu.op_class::SimdAddAcc 0 0.00% 59.37% |
| system.cpu.op_class::SimdAlu 0 0.00% 59.37% |
| system.cpu.op_class::SimdCmp 0 0.00% 59.37% |
| system.cpu.op_class::SimdCvt 0 0.00% 59.37% |
| system.cpu.op_class::SimdMisc 0 0.00% 59.37% |
| system.cpu.op_class::SimdMult 0 0.00% 59.37% |
| system.cpu.op_class::SimdMultAcc 0 0.00% 59.37% |
| system.cpu.op_class::SimdShift 0 0.00% 59.37% |
| system.cpu.op_class::SimdShiftAcc 0 0.00% 59.37% |
| system.cpu.op_class::SimdSqrt 0 0.00% 59.37% |
| system.cpu.op_class::SimdFloatAdd 0 0.00% 59.37% |
| system.cpu.op_class::SimdFloatAlu 0 0.00% 59.37% |
| system.cpu.op_class::SimdFloatCmp 0 0.00% 59.37% |
| system.cpu.op_class::SimdFloatCvt 0 0.00% 59.37% |
| system.cpu.op_class::SimdFloatDiv 0 0.00% 59.37% |
| system.cpu.op_class::SimdFloatMisc 0 0.00% 59.37% |
| system.cpu.op_class::SimdFloatMult 0 0.00% 59.37% |
| system.cpu.op_class::SimdFloatMultAcc 0 0.00% 59.37% |
| system.cpu.op_class::SimdFloatSqrt 0 0.00% 59.37% |
| system.cpu.op_class::MemRead 104951 25.13% 84.50% |
| system.cpu.op_class::MemWrite 63954 15.31% 99.82% |
| system.cpu.op_class::FloatMemRead 547 0.13% 99.95% |
| system.cpu.op_class::FloatMemWrite 172 0.04% 99.99% |
| system.cpu.op_class::IprAccess 0 0.00% 99.99% |
| system.cpu.op_class::InstPrefetch 0 0.00% 99.99% |
| system.cpu.op_class::total 417493 |
| system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 755664500 |
| system.cpu.dcache.tags.replacements 2 |
| system.cpu.dcache.tags.tagsinuse 436.556179 |
| system.cpu.dcache.tags.total_refs 169094 |
| system.cpu.dcache.tags.sampled_refs 530 |
| system.cpu.dcache.tags.avg_refs 319.045283 |
| system.cpu.dcache.tags.warmup_cycle 0 |
| system.cpu.dcache.tags.occ_blocks::cpu.data 436.556179 |
| system.cpu.dcache.tags.occ_percent::cpu.data 0.106581 |
| system.cpu.dcache.tags.occ_percent::total 0.106581 |
| system.cpu.dcache.tags.occ_task_id_blocks::1024 528 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::0 15 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::1 9 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::2 504 |
| system.cpu.dcache.tags.occ_task_id_percent::1024 0.128906 |
| system.cpu.dcache.tags.tag_accesses 339778 |
| system.cpu.dcache.tags.data_accesses 339778 |
| system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 755664500 |
| system.cpu.dcache.ReadReq_hits::cpu.data 103506 |
| system.cpu.dcache.ReadReq_hits::total 103506 |
| system.cpu.dcache.WriteReq_hits::cpu.data 62208 |
| system.cpu.dcache.WriteReq_hits::total 62208 |
| system.cpu.dcache.LoadLockedReq_hits::cpu.data 1689 |
| system.cpu.dcache.LoadLockedReq_hits::total 1689 |
| system.cpu.dcache.StoreCondReq_hits::cpu.data 1691 |
| system.cpu.dcache.StoreCondReq_hits::total 1691 |
| system.cpu.dcache.demand_hits::cpu.data 165714 |
| system.cpu.dcache.demand_hits::total 165714 |
| system.cpu.dcache.overall_hits::cpu.data 165714 |
| system.cpu.dcache.overall_hits::total 165714 |
| system.cpu.dcache.ReadReq_misses::cpu.data 301 |
| system.cpu.dcache.ReadReq_misses::total 301 |
| system.cpu.dcache.WriteReq_misses::cpu.data 227 |
| system.cpu.dcache.WriteReq_misses::total 227 |
| system.cpu.dcache.LoadLockedReq_misses::cpu.data 2 |
| system.cpu.dcache.LoadLockedReq_misses::total 2 |
| system.cpu.dcache.demand_misses::cpu.data 528 |
| system.cpu.dcache.demand_misses::total 528 |
| system.cpu.dcache.overall_misses::cpu.data 528 |
| system.cpu.dcache.overall_misses::total 528 |
| system.cpu.dcache.ReadReq_miss_latency::cpu.data 18963000 |
| system.cpu.dcache.ReadReq_miss_latency::total 18963000 |
| system.cpu.dcache.WriteReq_miss_latency::cpu.data 14301000 |
| system.cpu.dcache.WriteReq_miss_latency::total 14301000 |
| system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data 126000 |
| system.cpu.dcache.LoadLockedReq_miss_latency::total 126000 |
| system.cpu.dcache.demand_miss_latency::cpu.data 33264000 |
| system.cpu.dcache.demand_miss_latency::total 33264000 |
| system.cpu.dcache.overall_miss_latency::cpu.data 33264000 |
| system.cpu.dcache.overall_miss_latency::total 33264000 |
| system.cpu.dcache.ReadReq_accesses::cpu.data 103807 |
| system.cpu.dcache.ReadReq_accesses::total 103807 |
| system.cpu.dcache.WriteReq_accesses::cpu.data 62435 |
| system.cpu.dcache.WriteReq_accesses::total 62435 |
| system.cpu.dcache.LoadLockedReq_accesses::cpu.data 1691 |
| system.cpu.dcache.LoadLockedReq_accesses::total 1691 |
| system.cpu.dcache.StoreCondReq_accesses::cpu.data 1691 |
| system.cpu.dcache.StoreCondReq_accesses::total 1691 |
| system.cpu.dcache.demand_accesses::cpu.data 166242 |
| system.cpu.dcache.demand_accesses::total 166242 |
| system.cpu.dcache.overall_accesses::cpu.data 166242 |
| system.cpu.dcache.overall_accesses::total 166242 |
| system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.002899 |
| system.cpu.dcache.ReadReq_miss_rate::total 0.002899 |
| system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.003635 |
| system.cpu.dcache.WriteReq_miss_rate::total 0.003635 |
| system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.001182 |
| system.cpu.dcache.LoadLockedReq_miss_rate::total 0.001182 |
| system.cpu.dcache.demand_miss_rate::cpu.data 0.003176 |
| system.cpu.dcache.demand_miss_rate::total 0.003176 |
| system.cpu.dcache.overall_miss_rate::cpu.data 0.003176 |
| system.cpu.dcache.overall_miss_rate::total 0.003176 |
| system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.ReadReq_avg_miss_latency::total 63000 |
| system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.WriteReq_avg_miss_latency::total 63000 |
| system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 63000 |
| system.cpu.dcache.demand_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.demand_avg_miss_latency::total 63000 |
| system.cpu.dcache.overall_avg_miss_latency::cpu.data 63000 |
| system.cpu.dcache.overall_avg_miss_latency::total 63000 |
| system.cpu.dcache.blocked_cycles::no_mshrs 0 |
| system.cpu.dcache.blocked_cycles::no_targets 0 |
| system.cpu.dcache.blocked::no_mshrs 0 |
| system.cpu.dcache.blocked::no_targets 0 |
| system.cpu.dcache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.dcache.avg_blocked_cycles::no_targets nan |
| system.cpu.dcache.writebacks::writebacks 2 |
| system.cpu.dcache.writebacks::total 2 |
| system.cpu.dcache.ReadReq_mshr_misses::cpu.data 301 |
| system.cpu.dcache.ReadReq_mshr_misses::total 301 |
| system.cpu.dcache.WriteReq_mshr_misses::cpu.data 227 |
| system.cpu.dcache.WriteReq_mshr_misses::total 227 |
| system.cpu.dcache.LoadLockedReq_mshr_misses::cpu.data 2 |
| system.cpu.dcache.LoadLockedReq_mshr_misses::total 2 |
| system.cpu.dcache.demand_mshr_misses::cpu.data 528 |
| system.cpu.dcache.demand_mshr_misses::total 528 |
| system.cpu.dcache.overall_mshr_misses::cpu.data 528 |
| system.cpu.dcache.overall_mshr_misses::total 528 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 18662000 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::total 18662000 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 14074000 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::total 14074000 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_latency::cpu.data 124000 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_latency::total 124000 |
| system.cpu.dcache.demand_mshr_miss_latency::cpu.data 32736000 |
| system.cpu.dcache.demand_mshr_miss_latency::total 32736000 |
| system.cpu.dcache.overall_mshr_miss_latency::cpu.data 32736000 |
| system.cpu.dcache.overall_mshr_miss_latency::total 32736000 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.002899 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.002899 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.003635 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.003635 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data 0.001182 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total 0.001182 |
| system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.003176 |
| system.cpu.dcache.demand_mshr_miss_rate::total 0.003176 |
| system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.003176 |
| system.cpu.dcache.overall_mshr_miss_rate::total 0.003176 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::total 62000 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 62000 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::total 62000 |
| system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 755664500 |
| system.cpu.icache.tags.replacements 55 |
| system.cpu.icache.tags.tagsinuse 692.579354 |
| system.cpu.icache.tags.total_refs 486513 |
| system.cpu.icache.tags.sampled_refs 1059 |
| system.cpu.icache.tags.avg_refs 459.407932 |
| system.cpu.icache.tags.warmup_cycle 0 |
| system.cpu.icache.tags.occ_blocks::cpu.inst 692.579354 |
| system.cpu.icache.tags.occ_percent::cpu.inst 0.338173 |
| system.cpu.icache.tags.occ_percent::total 0.338173 |
| system.cpu.icache.tags.occ_task_id_blocks::1024 1004 |
| system.cpu.icache.tags.age_task_id_blocks_1024::0 41 |
| system.cpu.icache.tags.age_task_id_blocks_1024::1 45 |
| system.cpu.icache.tags.age_task_id_blocks_1024::2 918 |
| system.cpu.icache.tags.occ_task_id_percent::1024 0.490234 |
| system.cpu.icache.tags.tag_accesses 976203 |
| system.cpu.icache.tags.data_accesses 976203 |
| system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 755664500 |
| system.cpu.icache.ReadReq_hits::cpu.inst 486513 |
| system.cpu.icache.ReadReq_hits::total 486513 |
| system.cpu.icache.demand_hits::cpu.inst 486513 |
| system.cpu.icache.demand_hits::total 486513 |
| system.cpu.icache.overall_hits::cpu.inst 486513 |
| system.cpu.icache.overall_hits::total 486513 |
| system.cpu.icache.ReadReq_misses::cpu.inst 1059 |
| system.cpu.icache.ReadReq_misses::total 1059 |
| system.cpu.icache.demand_misses::cpu.inst 1059 |
| system.cpu.icache.demand_misses::total 1059 |
| system.cpu.icache.overall_misses::cpu.inst 1059 |
| system.cpu.icache.overall_misses::total 1059 |
| system.cpu.icache.ReadReq_miss_latency::cpu.inst 66668500 |
| system.cpu.icache.ReadReq_miss_latency::total 66668500 |
| system.cpu.icache.demand_miss_latency::cpu.inst 66668500 |
| system.cpu.icache.demand_miss_latency::total 66668500 |
| system.cpu.icache.overall_miss_latency::cpu.inst 66668500 |
| system.cpu.icache.overall_miss_latency::total 66668500 |
| system.cpu.icache.ReadReq_accesses::cpu.inst 487572 |
| system.cpu.icache.ReadReq_accesses::total 487572 |
| system.cpu.icache.demand_accesses::cpu.inst 487572 |
| system.cpu.icache.demand_accesses::total 487572 |
| system.cpu.icache.overall_accesses::cpu.inst 487572 |
| system.cpu.icache.overall_accesses::total 487572 |
| system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.002171 |
| system.cpu.icache.ReadReq_miss_rate::total 0.002171 |
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| system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 62954.202077 |
| system.cpu.icache.ReadReq_avg_miss_latency::total 62954.202077 |
| system.cpu.icache.demand_avg_miss_latency::cpu.inst 62954.202077 |
| system.cpu.icache.demand_avg_miss_latency::total 62954.202077 |
| system.cpu.icache.overall_avg_miss_latency::cpu.inst 62954.202077 |
| system.cpu.icache.overall_avg_miss_latency::total 62954.202077 |
| system.cpu.icache.blocked_cycles::no_mshrs 0 |
| system.cpu.icache.blocked_cycles::no_targets 0 |
| system.cpu.icache.blocked::no_mshrs 0 |
| system.cpu.icache.blocked::no_targets 0 |
| system.cpu.icache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.icache.avg_blocked_cycles::no_targets nan |
| system.cpu.icache.writebacks::writebacks 55 |
| system.cpu.icache.writebacks::total 55 |
| system.cpu.icache.ReadReq_mshr_misses::cpu.inst 1059 |
| system.cpu.icache.ReadReq_mshr_misses::total 1059 |
| system.cpu.icache.demand_mshr_misses::cpu.inst 1059 |
| system.cpu.icache.demand_mshr_misses::total 1059 |
| system.cpu.icache.overall_mshr_misses::cpu.inst 1059 |
| system.cpu.icache.overall_mshr_misses::total 1059 |
| system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 65609500 |
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| system.cpu.icache.overall_mshr_miss_latency::cpu.inst 65609500 |
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| system.cpu.l2cache.tags.replacements 0 |
| system.cpu.l2cache.tags.tagsinuse 1156.359441 |
| system.cpu.l2cache.tags.total_refs 58 |
| system.cpu.l2cache.tags.sampled_refs 1588 |
| system.cpu.l2cache.tags.avg_refs 0.036523 |
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| system.cpu.l2cache.tags.occ_blocks::cpu.inst 719.404689 |
| system.cpu.l2cache.tags.occ_blocks::cpu.data 436.954751 |
| system.cpu.l2cache.tags.occ_percent::cpu.inst 0.021954 |
| system.cpu.l2cache.tags.occ_percent::cpu.data 0.013334 |
| system.cpu.l2cache.tags.occ_percent::total 0.035289 |
| system.cpu.l2cache.tags.occ_task_id_blocks::1024 1588 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::0 56 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::1 54 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::2 1478 |
| system.cpu.l2cache.tags.occ_task_id_percent::1024 0.048461 |
| system.cpu.l2cache.tags.tag_accesses 14756 |
| system.cpu.l2cache.tags.data_accesses 14756 |
| system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 755664500 |
| system.cpu.l2cache.WritebackDirty_hits::writebacks 2 |
| system.cpu.l2cache.WritebackDirty_hits::total 2 |
| system.cpu.l2cache.WritebackClean_hits::writebacks 55 |
| system.cpu.l2cache.WritebackClean_hits::total 55 |
| system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 1 |
| system.cpu.l2cache.ReadCleanReq_hits::total 1 |
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| system.cpu.l2cache.demand_hits::total 1 |
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| system.cpu.l2cache.overall_hits::total 1 |
| system.cpu.l2cache.ReadExReq_misses::cpu.data 227 |
| system.cpu.l2cache.ReadExReq_misses::total 227 |
| system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 1058 |
| system.cpu.l2cache.ReadCleanReq_misses::total 1058 |
| system.cpu.l2cache.ReadSharedReq_misses::cpu.data 303 |
| system.cpu.l2cache.ReadSharedReq_misses::total 303 |
| system.cpu.l2cache.demand_misses::cpu.inst 1058 |
| system.cpu.l2cache.demand_misses::cpu.data 530 |
| system.cpu.l2cache.demand_misses::total 1588 |
| system.cpu.l2cache.overall_misses::cpu.inst 1058 |
| system.cpu.l2cache.overall_misses::cpu.data 530 |
| system.cpu.l2cache.overall_misses::total 1588 |
| system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 13733500 |
| system.cpu.l2cache.ReadExReq_miss_latency::total 13733500 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst 64010000 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::total 64010000 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data 18331500 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::total 18331500 |
| system.cpu.l2cache.demand_miss_latency::cpu.inst 64010000 |
| system.cpu.l2cache.demand_miss_latency::cpu.data 32065000 |
| system.cpu.l2cache.demand_miss_latency::total 96075000 |
| system.cpu.l2cache.overall_miss_latency::cpu.inst 64010000 |
| system.cpu.l2cache.overall_miss_latency::cpu.data 32065000 |
| system.cpu.l2cache.overall_miss_latency::total 96075000 |
| system.cpu.l2cache.WritebackDirty_accesses::writebacks 2 |
| system.cpu.l2cache.WritebackDirty_accesses::total 2 |
| system.cpu.l2cache.WritebackClean_accesses::writebacks 55 |
| system.cpu.l2cache.WritebackClean_accesses::total 55 |
| system.cpu.l2cache.ReadExReq_accesses::cpu.data 227 |
| system.cpu.l2cache.ReadExReq_accesses::total 227 |
| system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 1059 |
| system.cpu.l2cache.ReadCleanReq_accesses::total 1059 |
| system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 303 |
| system.cpu.l2cache.ReadSharedReq_accesses::total 303 |
| system.cpu.l2cache.demand_accesses::cpu.inst 1059 |
| system.cpu.l2cache.demand_accesses::cpu.data 530 |
| system.cpu.l2cache.demand_accesses::total 1589 |
| system.cpu.l2cache.overall_accesses::cpu.inst 1059 |
| system.cpu.l2cache.overall_accesses::cpu.data 530 |
| system.cpu.l2cache.overall_accesses::total 1589 |
| system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadExReq_miss_rate::total 1 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.999055 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.999055 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::total 1 |
| system.cpu.l2cache.demand_miss_rate::cpu.inst 0.999055 |
| system.cpu.l2cache.demand_miss_rate::cpu.data 1 |
| system.cpu.l2cache.demand_miss_rate::total 0.999370 |
| system.cpu.l2cache.overall_miss_rate::cpu.inst 0.999055 |
| system.cpu.l2cache.overall_miss_rate::cpu.data 1 |
| system.cpu.l2cache.overall_miss_rate::total 0.999370 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::total 60500 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 60500.945179 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 60500.945179 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 60500 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 60500.945179 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.demand_avg_miss_latency::total 60500.629722 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 60500.945179 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.data 60500 |
| system.cpu.l2cache.overall_avg_miss_latency::total 60500.629722 |
| system.cpu.l2cache.blocked_cycles::no_mshrs 0 |
| system.cpu.l2cache.blocked_cycles::no_targets 0 |
| system.cpu.l2cache.blocked::no_mshrs 0 |
| system.cpu.l2cache.blocked::no_targets 0 |
| system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.l2cache.avg_blocked_cycles::no_targets nan |
| system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 227 |
| system.cpu.l2cache.ReadExReq_mshr_misses::total 227 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst 1058 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::total 1058 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data 303 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::total 303 |
| system.cpu.l2cache.demand_mshr_misses::cpu.inst 1058 |
| system.cpu.l2cache.demand_mshr_misses::cpu.data 530 |
| system.cpu.l2cache.demand_mshr_misses::total 1588 |
| system.cpu.l2cache.overall_mshr_misses::cpu.inst 1058 |
| system.cpu.l2cache.overall_mshr_misses::cpu.data 530 |
| system.cpu.l2cache.overall_mshr_misses::total 1588 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 11463500 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 11463500 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 53430000 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 53430000 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 15301500 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 15301500 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 53430000 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 26765000 |
| system.cpu.l2cache.demand_mshr_miss_latency::total 80195000 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 53430000 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 26765000 |
| system.cpu.l2cache.overall_mshr_miss_latency::total 80195000 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.999055 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.999055 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 1 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.999055 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.demand_mshr_miss_rate::total 0.999370 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.999055 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.overall_mshr_miss_rate::total 0.999370 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 50500 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50500.945179 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50500.945179 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 50500 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50500.945179 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50500.629722 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50500.945179 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 50500 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50500.629722 |
| system.cpu.toL2Bus.snoop_filter.tot_requests 1646 |
| system.cpu.toL2Bus.snoop_filter.hit_single_requests 57 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 |
| system.cpu.toL2Bus.snoop_filter.tot_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 |
| system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 755664500 |
| system.cpu.toL2Bus.trans_dist::ReadResp 1362 |
| system.cpu.toL2Bus.trans_dist::WritebackDirty 2 |
| system.cpu.toL2Bus.trans_dist::WritebackClean 55 |
| system.cpu.toL2Bus.trans_dist::ReadExReq 227 |
| system.cpu.toL2Bus.trans_dist::ReadExResp 227 |
| system.cpu.toL2Bus.trans_dist::ReadCleanReq 1059 |
| system.cpu.toL2Bus.trans_dist::ReadSharedReq 303 |
| system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 2173 |
| system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 1062 |
| system.cpu.toL2Bus.pkt_count::total 3235 |
| system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 71296 |
| system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 34048 |
| system.cpu.toL2Bus.pkt_size::total 105344 |
| system.cpu.toL2Bus.snoops 0 |
| system.cpu.toL2Bus.snoopTraffic 0 |
| system.cpu.toL2Bus.snoop_fanout::samples 1589 |
| system.cpu.toL2Bus.snoop_fanout::mean 0 |
| system.cpu.toL2Bus.snoop_fanout::stdev -0 |
| system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.cpu.toL2Bus.snoop_fanout::0 1589 100.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::min_value 0 |
| system.cpu.toL2Bus.snoop_fanout::max_value 0 |
| system.cpu.toL2Bus.snoop_fanout::total 1589 |
| system.cpu.toL2Bus.reqLayer0.occupancy 880000 |
| system.cpu.toL2Bus.reqLayer0.utilization 0.1 |
| system.cpu.toL2Bus.respLayer0.occupancy 1588500 |
| system.cpu.toL2Bus.respLayer0.utilization 0.2 |
| system.cpu.toL2Bus.respLayer1.occupancy 795000 |
| system.cpu.toL2Bus.respLayer1.utilization 0.1 |
| system.membus.snoop_filter.tot_requests 1588 |
| system.membus.snoop_filter.hit_single_requests 0 |
| system.membus.snoop_filter.hit_multi_requests 0 |
| system.membus.snoop_filter.tot_snoops 0 |
| system.membus.snoop_filter.hit_single_snoops 0 |
| system.membus.snoop_filter.hit_multi_snoops 0 |
| system.membus.pwrStateResidencyTicks::UNDEFINED 755664500 |
| system.membus.trans_dist::ReadResp 1361 |
| system.membus.trans_dist::ReadExReq 227 |
| system.membus.trans_dist::ReadExResp 227 |
| system.membus.trans_dist::ReadSharedReq 1361 |
| system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 3176 |
| system.membus.pkt_count::total 3176 |
| system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 101632 |
| system.membus.pkt_size::total 101632 |
| system.membus.snoops 0 |
| system.membus.snoopTraffic 0 |
| system.membus.snoop_fanout::samples 1588 |
| system.membus.snoop_fanout::mean 0 |
| system.membus.snoop_fanout::stdev -0 |
| system.membus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.membus.snoop_fanout::0 1588 100.00% 100.00% |
| system.membus.snoop_fanout::1 0 0.00% 100.00% |
| system.membus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.membus.snoop_fanout::min_value 0 |
| system.membus.snoop_fanout::max_value 0 |
| system.membus.snoop_fanout::total 1588 |
| system.membus.reqLayer0.occupancy 1589000 |
| system.membus.reqLayer0.utilization 0.2 |
| system.membus.respLayer1.occupancy 7940000 |
| system.membus.respLayer1.utilization 1.0 |
| |
| ---------- End Simulation Statistics ---------- |
