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Akash Bagdia7d7ab732013-06-27 05:49:49 -04001/*
Stephan Diestelhorst65cea472014-06-30 13:56:06 -04002 * Copyright (c) 2013-2014 ARM Limited
Christopher Torngb4b03a62013-12-29 19:29:45 -06003 * Copyright (c) 2013 Cornell University
Akash Bagdia7d7ab732013-06-27 05:49:49 -04004 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license
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25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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37 *
38 * Authors: Vasileios Spiliopoulos
39 * Akash Bagdia
40 * Andreas Hansson
Christopher Torngb4b03a62013-12-29 19:29:45 -060041 * Christopher Torng
Stephan Diestelhorst65cea472014-06-30 13:56:06 -040042 * Stephan Diestelhorst
Akash Bagdia7d7ab732013-06-27 05:49:49 -040043 */
44
Brandon Potter7a8dda42016-11-09 14:27:37 -060045#include "sim/clock_domain.hh"
46
Stephan Diestelhorst65cea472014-06-30 13:56:06 -040047#include <algorithm>
48#include <functional>
49
Brandon Pottera928a432016-11-09 14:27:40 -060050#include "base/trace.hh"
Akash Bagdia7d7ab732013-06-27 05:49:49 -040051#include "debug/ClockDomain.hh"
52#include "params/ClockDomain.hh"
53#include "params/DerivedClockDomain.hh"
54#include "params/SrcClockDomain.hh"
Christopher Torngb4b03a62013-12-29 19:29:45 -060055#include "sim/clocked_object.hh"
Brandon Potter7a8dda42016-11-09 14:27:37 -060056#include "sim/voltage_domain.hh"
Akash Bagdia7d7ab732013-06-27 05:49:49 -040057
Andreas Hansson1d85e912014-01-24 15:29:30 -060058void
59ClockDomain::regStats()
60{
David Guillen Fandos70798b12016-06-06 17:16:43 +010061 SimObject::regStats();
62
Andreas Hansson1d85e912014-01-24 15:29:30 -060063 using namespace Stats;
64
65 // Expose the current clock period as a stat for observability in
66 // the dumps
67 currentClock
68 .scalar(_clockPeriod)
69 .name(params()->name + ".clock")
70 .desc("Clock period in ticks")
71 ;
72}
73
Akash Bagdiae7e17f92013-08-19 03:52:28 -040074double
75ClockDomain::voltage() const
76{
77 return _voltageDomain->voltage();
78}
79
80SrcClockDomain::SrcClockDomain(const Params *p) :
Stephan Diestelhorst65cea472014-06-30 13:56:06 -040081 ClockDomain(p, p->voltage_domain),
82 freqOpPoints(p->clock),
83 _domainID(p->domain_id),
84 _perfLevel(p->init_perf_level)
Akash Bagdia7d7ab732013-06-27 05:49:49 -040085{
Stephan Diestelhorst65cea472014-06-30 13:56:06 -040086 VoltageDomain *vdom = p->voltage_domain;
87
88 fatal_if(freqOpPoints.empty(), "DVFS: Empty set of frequencies for "\
89 "domain %d %s\n", _domainID, name());
90
91 fatal_if(!vdom, "DVFS: Empty voltage domain specified for "\
92 "domain %d %s\n", _domainID, name());
93
94 fatal_if((vdom->numVoltages() > 1) &&
95 (vdom->numVoltages() != freqOpPoints.size()),
96 "DVFS: Number of frequency and voltage scaling points do "\
97 "not match: %d:%d ID: %d %s.\n", vdom->numVoltages(),
98 freqOpPoints.size(), _domainID, name());
99
100 // Frequency (& voltage) points should be declared in descending order,
101 // NOTE: Frequency is inverted to ticks, so checking for ascending ticks
102 fatal_if(!std::is_sorted(freqOpPoints.begin(), freqOpPoints.end()),
103 "DVFS: Frequency operation points not in descending order for "\
104 "domain with ID %d\n", _domainID);
105
106 fatal_if(_perfLevel >= freqOpPoints.size(), "DVFS: Initial DVFS point %d "\
107 "is outside of list for Domain ID: %d\n", _perfLevel, _domainID);
108
109 clockPeriod(freqOpPoints[_perfLevel]);
110
111 vdom->registerSrcClockDom(this);
Akash Bagdia7d7ab732013-06-27 05:49:49 -0400112}
113
114void
115SrcClockDomain::clockPeriod(Tick clock_period)
116{
117 if (clock_period == 0) {
118 fatal("%s has a clock period of zero\n", name());
119 }
120
Christopher Torngb4b03a62013-12-29 19:29:45 -0600121 // Align all members to the current tick
122 for (auto m = members.begin(); m != members.end(); ++m) {
123 (*m)->updateClockPeriod();
124 }
125
Akash Bagdia7d7ab732013-06-27 05:49:49 -0400126 _clockPeriod = clock_period;
127
128 DPRINTF(ClockDomain,
129 "Setting clock period to %d ticks for source clock %s\n",
130 _clockPeriod, name());
131
132 // inform any derived clocks they need to updated their period
133 for (auto c = children.begin(); c != children.end(); ++c) {
134 (*c)->updateClockPeriod();
135 }
136}
137
Stephan Diestelhorst65cea472014-06-30 13:56:06 -0400138void
139SrcClockDomain::perfLevel(PerfLevel perf_level)
140{
141 assert(validPerfLevel(perf_level));
142
Stephan Diestelhorst4422d132014-06-16 14:59:44 +0100143 if (perf_level == _perfLevel) {
144 // Silently ignore identical overwrites
145 return;
146 }
147
Stephan Diestelhorst65cea472014-06-30 13:56:06 -0400148 DPRINTF(ClockDomain, "DVFS: Switching performance level of domain %s "\
149 "(id: %d) from %d to %d\n", name(), domainID(), _perfLevel,
150 perf_level);
151
152 _perfLevel = perf_level;
153
Sascha Bischoffebc9e1d2016-04-01 16:22:44 +0100154 signalPerfLevelUpdate();
155}
156
157void SrcClockDomain::signalPerfLevelUpdate()
158{
Stephan Diestelhorst65cea472014-06-30 13:56:06 -0400159 // Signal the voltage domain that we have changed our perf level so that the
160 // voltage domain can recompute its performance level
161 voltageDomain()->sanitiseVoltages();
162
163 // Integrated switching of the actual clock value, too
164 clockPeriod(clkPeriodAtPerfLevel());
165}
166
167void
Andreas Sandberg76cd4392015-07-07 09:51:03 +0100168SrcClockDomain::serialize(CheckpointOut &cp) const
Stephan Diestelhorst65cea472014-06-30 13:56:06 -0400169{
170 SERIALIZE_SCALAR(_perfLevel);
Andreas Sandberg76cd4392015-07-07 09:51:03 +0100171 ClockDomain::serialize(cp);
Stephan Diestelhorst65cea472014-06-30 13:56:06 -0400172}
173
174void
Andreas Sandberg76cd4392015-07-07 09:51:03 +0100175SrcClockDomain::unserialize(CheckpointIn &cp)
Stephan Diestelhorst65cea472014-06-30 13:56:06 -0400176{
Andreas Sandberg76cd4392015-07-07 09:51:03 +0100177 ClockDomain::unserialize(cp);
Stephan Diestelhorst65cea472014-06-30 13:56:06 -0400178 UNSERIALIZE_SCALAR(_perfLevel);
Stephan Diestelhorst4422d132014-06-16 14:59:44 +0100179}
180
181void
182SrcClockDomain::startup()
183{
184 // Perform proper clock update when all related components have been
185 // created (i.e. after unserialization / object creation)
Sascha Bischoffebc9e1d2016-04-01 16:22:44 +0100186 signalPerfLevelUpdate();
Stephan Diestelhorst65cea472014-06-30 13:56:06 -0400187}
188
Akash Bagdia7d7ab732013-06-27 05:49:49 -0400189SrcClockDomain *
190SrcClockDomainParams::create()
191{
192 return new SrcClockDomain(this);
193}
194
195DerivedClockDomain::DerivedClockDomain(const Params *p) :
Akash Bagdiae7e17f92013-08-19 03:52:28 -0400196 ClockDomain(p, p->clk_domain->voltageDomain()),
Akash Bagdia7d7ab732013-06-27 05:49:49 -0400197 parent(*p->clk_domain),
198 clockDivider(p->clk_divider)
199{
200 // Ensure that clock divider setting works as frequency divider and never
201 // work as frequency multiplier
202 if (clockDivider < 1) {
203 fatal("Clock divider param cannot be less than 1");
204 }
205
206 // let the parent keep track of this derived domain so that it can
207 // propagate changes
208 parent.addDerivedDomain(this);
209
210 // update our clock period based on the parents clock
211 updateClockPeriod();
212}
213
214void
215DerivedClockDomain::updateClockPeriod()
216{
Christopher Torngb4b03a62013-12-29 19:29:45 -0600217 // Align all members to the current tick
218 for (auto m = members.begin(); m != members.end(); ++m) {
219 (*m)->updateClockPeriod();
220 }
221
Akash Bagdia7d7ab732013-06-27 05:49:49 -0400222 // recalculate the clock period, relying on the fact that changes
223 // propagate downwards in the tree
224 _clockPeriod = parent.clockPeriod() * clockDivider;
225
226 DPRINTF(ClockDomain,
227 "Setting clock period to %d ticks for derived clock %s\n",
228 _clockPeriod, name());
229
230 // inform any derived clocks
231 for (auto c = children.begin(); c != children.end(); ++c) {
232 (*c)->updateClockPeriod();
233 }
234}
235
236DerivedClockDomain *
237DerivedClockDomainParams::create()
238{
239 return new DerivedClockDomain(this);
240}