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Lisa Hsu161b8d12006-12-01 01:24:01 -05001# Copyright (c) 2006 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Lisa Hsu
28
29import m5
30from m5.objects import *
Nathan Binkert9a8cb7d2009-09-22 15:24:16 -070031m5.util.addToPath('../configs/common')
Lisa Hsu161b8d12006-12-01 01:24:01 -050032from FSConfig import *
33from Benchmarks import *
34
Andreas Hansson3bc4ecd2013-05-30 12:54:14 -040035test_sys = makeLinuxAlphaSystem('atomic', SimpleMemory,
Lisa Hsu161b8d12006-12-01 01:24:01 -050036 SysConfig('netperf-stream-client.rcS'))
Akash Bagdia7d7ab732013-06-27 05:49:49 -040037
38# Create the system clock domain
39test_sys.clk_domain = SrcClockDomain(clock = '1GHz')
40
Lisa Hsu161b8d12006-12-01 01:24:01 -050041test_sys.cpu = AtomicSimpleCPU(cpu_id=0)
Andreas Hansson32eae802012-03-02 09:21:48 -050042# create the interrupt controller
43test_sys.cpu.createInterruptController()
Gabe Black00f24ae2011-02-03 20:23:00 -080044test_sys.cpu.connectAllPorts(test_sys.membus)
Akash Bagdia7d7ab732013-06-27 05:49:49 -040045
46# Create a seperate clock domain for components that should run at
47# CPUs frequency
48test_sys.cpu.clk_domain = SrcClockDomain(clock = '2GHz')
49
50# Create a separate clock domain for Ethernet
51test_sys.tsunami.ethernet.clk_domain = SrcClockDomain(clock = '500MHz')
52
Andreas Hansson2208ea02012-01-17 12:55:09 -060053# In contrast to the other (one-system) Tsunami configurations we do
54# not have an IO cache but instead rely on an IO bridge for accesses
55# from masters on the IO bus to the memory bus
Andreas Hanssone65de3f2013-01-07 13:05:38 -050056test_sys.iobridge = Bridge(delay='50ns', ranges = test_sys.mem_ranges)
Andreas Hansson5a9a7432012-02-13 06:43:09 -050057test_sys.iobridge.slave = test_sys.iobus.master
58test_sys.iobridge.master = test_sys.membus.slave
Lisa Hsu161b8d12006-12-01 01:24:01 -050059
Andreas Hansson3bc4ecd2013-05-30 12:54:14 -040060drive_sys = makeLinuxAlphaSystem('atomic', SimpleMemory,
Lisa Hsu161b8d12006-12-01 01:24:01 -050061 SysConfig('netperf-server.rcS'))
Akash Bagdia7d7ab732013-06-27 05:49:49 -040062# Create the system clock domain
63drive_sys.clk_domain = SrcClockDomain(clock = '1GHz')
Lisa Hsu161b8d12006-12-01 01:24:01 -050064drive_sys.cpu = AtomicSimpleCPU(cpu_id=0)
Andreas Hansson32eae802012-03-02 09:21:48 -050065# create the interrupt controller
66drive_sys.cpu.createInterruptController()
Gabe Black00f24ae2011-02-03 20:23:00 -080067drive_sys.cpu.connectAllPorts(drive_sys.membus)
Akash Bagdia7d7ab732013-06-27 05:49:49 -040068
69# Create a seperate clock domain for components that should run at
70# CPUs frequency
71drive_sys.cpu.clk_domain = SrcClockDomain(clock = '4GHz')
72
73# Create a separate clock domain for Ethernet
74drive_sys.tsunami.ethernet.clk_domain = SrcClockDomain(clock = '500MHz')
75
Andreas Hanssone65de3f2013-01-07 13:05:38 -050076drive_sys.iobridge = Bridge(delay='50ns', ranges = drive_sys.mem_ranges)
Andreas Hansson5a9a7432012-02-13 06:43:09 -050077drive_sys.iobridge.slave = drive_sys.iobus.master
78drive_sys.iobridge.master = drive_sys.membus.slave
Lisa Hsu161b8d12006-12-01 01:24:01 -050079
Gabe Blackec20ee22012-01-28 07:24:34 -080080root = makeDualRoot(True, test_sys, drive_sys, "ethertrace")
Lisa Hsu161b8d12006-12-01 01:24:01 -050081
82maxtick = 199999999