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Ali Saidi0e805e12004-01-21 20:14:10 -05001/*
Steve Reinhardtad8b9632005-06-05 05:16:00 -04002 * Copyright (c) 2004-2005 The Regents of The University of Michigan
Ali Saidi0e805e12004-01-21 20:14:10 -05003 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Ali Saidicb0cf2d2006-05-31 19:26:56 -040027 *
28 * Authors: Ali Saidi
29 * Andrew Schultz
30 * Miguel Serrano
Ali Saidi0e805e12004-01-21 20:14:10 -050031 */
32
Ali Saidi8bbaaa72005-06-04 23:56:53 -040033/** @file
34 * Tsunami I/O Space mapping including RTC/timer interrupts
Ali Saidi0e805e12004-01-21 20:14:10 -050035 */
36
Nathan Binkert92ed0df2005-02-21 17:32:57 -050037#ifndef __DEV_TSUNAMI_IO_HH__
38#define __DEV_TSUNAMI_IO_HH__
Ali Saidi0e805e12004-01-21 20:14:10 -050039
Gabe Blackdd14c862006-11-06 19:45:00 -050040#include "dev/alpha/tsunami.hh"
Andreas Sandbergc0ab5272012-11-02 11:32:01 -050041#include "dev/alpha/tsunami_cchip.hh"
Gabe Black4f9a0402008-06-12 00:54:48 -040042#include "dev/intel_8254_timer.hh"
Nathan Binkertabc76f22007-07-23 21:51:38 -070043#include "dev/io_device.hh"
Nathan Binkert39a05562011-04-15 10:44:06 -070044#include "dev/mc146818.hh"
Nathan Binkertabc76f22007-07-23 21:51:38 -070045#include "params/TsunamiIO.hh"
Ali Saidi54b49f92004-06-26 21:26:28 -040046#include "sim/eventq.hh"
Ali Saidi0e805e12004-01-21 20:14:10 -050047
Ali Saidi8bbaaa72005-06-04 23:56:53 -040048/**
Ali Saidi9d0aa132004-05-30 17:45:46 -040049 * Tsunami I/O device is a catch all for all the south bridge stuff we care
50 * to implement.
Ali Saidi0e805e12004-01-21 20:14:10 -050051 */
Ali Saidif6fc18f2006-04-11 13:42:47 -040052class TsunamiIO : public BasicPioDevice
Ali Saidi0e805e12004-01-21 20:14:10 -050053{
Ali Saidib7f44f62004-01-26 13:26:34 -050054
Ali Saidi0e805e12004-01-21 20:14:10 -050055 protected:
Gabe Blacke5bdae12008-03-25 02:15:06 -040056
Nathan Binkerte0632102008-10-09 04:58:24 -070057 class RTC : public MC146818
Ali Saidif9f4a742004-01-22 19:02:07 -050058 {
Andrew Schultzc76675b2004-02-05 18:23:16 -050059 public:
Nathan Binkerte0632102008-10-09 04:58:24 -070060 Tsunami *tsunami;
61 RTC(const std::string &n, const TsunamiIOParams *p);
Miguel Serranob64eae52005-08-15 16:59:58 -040062
Gabe Blacke5bdae12008-03-25 02:15:06 -040063 protected:
64 void handleEvent()
65 {
66 //Actually interrupt the processor here
67 tsunami->cchip->postRTC();
68 }
Miguel Serranob64eae52005-08-15 16:59:58 -040069 };
Ali Saidif9f4a742004-01-22 19:02:07 -050070
Ali Saidi9d0aa132004-05-30 17:45:46 -040071 /** Mask of the PIC1 */
Andrew Schultzc76675b2004-02-05 18:23:16 -050072 uint8_t mask1;
Ali Saidi9d0aa132004-05-30 17:45:46 -040073
74 /** Mask of the PIC2 */
Andrew Schultzc76675b2004-02-05 18:23:16 -050075 uint8_t mask2;
Ali Saidi9d0aa132004-05-30 17:45:46 -040076
77 /** Mode of PIC1. Not used for anything */
Andrew Schultzc76675b2004-02-05 18:23:16 -050078 uint8_t mode1;
Ali Saidi9d0aa132004-05-30 17:45:46 -040079
80 /** Mode of PIC2. Not used for anything */
Andrew Schultzc76675b2004-02-05 18:23:16 -050081 uint8_t mode2;
Ali Saidide17a032004-01-22 00:08:48 -050082
Ali Saidi9d0aa132004-05-30 17:45:46 -040083 /** Raw PIC interrupt register before masking */
84 uint8_t picr; //Raw PIC interrput register
85
86 /** Is the pic interrupting right now or not. */
Ron Dreslinskid41c9042004-01-28 19:18:29 -050087 bool picInterrupting;
88
Ali Saidi9d0aa132004-05-30 17:45:46 -040089 /** A pointer to the Tsunami device which be belong to */
Ron Dreslinski3ccc0b12004-01-27 21:36:46 -050090 Tsunami *tsunami;
91
Miguel Serranob64eae52005-08-15 16:59:58 -040092 /** Intel 8253 Periodic Interval Timer */
Gabe Black4f9a0402008-06-12 00:54:48 -040093 Intel8254Timer pitimer;
Ali Saidib7f44f62004-01-26 13:26:34 -050094
Nathan Binkerte0632102008-10-09 04:58:24 -070095 RTC rtc;
Gabe Blacke5bdae12008-03-25 02:15:06 -040096
97 uint8_t rtcAddr;
Ali Saidib7f44f62004-01-26 13:26:34 -050098
Ali Saidi9d0aa132004-05-30 17:45:46 -040099 /** The interval is set via two writes to the PIT.
100 * This variable contains a flag as to how many writes have happened, and
101 * the time so far.
102 */
Miguel Serranob64eae52005-08-15 16:59:58 -0400103 uint16_t timerData;
Ali Saidif9f4a742004-01-22 19:02:07 -0500104
Ali Saidi0e805e12004-01-21 20:14:10 -0500105 public:
Ali Saidi6010f632004-06-01 17:36:38 -0400106 /**
107 * Return the freqency of the RTC
108 * @return interrupt rate of the RTC
109 */
Nathan Binkert5eab6c42005-04-11 15:32:06 -0400110 Tick frequency() const;
Ron Dreslinski3ccc0b12004-01-27 21:36:46 -0500111
Ali Saidie8b6eb42006-04-10 14:14:06 -0400112 public:
Nathan Binkertabc76f22007-07-23 21:51:38 -0700113 typedef TsunamiIOParams Params;
Ali Saidi9d0aa132004-05-30 17:45:46 -0400114 /**
115 * Initialize all the data for devices supported by Tsunami I/O.
Ali Saidie8b6eb42006-04-10 14:14:06 -0400116 * @param p pointer to Params struct
Ali Saidi9d0aa132004-05-30 17:45:46 -0400117 */
Nathan Binkertabc76f22007-07-23 21:51:38 -0700118 TsunamiIO(const Params *p);
119
120 const Params *
121 params() const
122 {
123 return dynamic_cast<const Params *>(_params);
124 }
Ali Saidi0e805e12004-01-21 20:14:10 -0500125
Andreas Hansson2ac04c12015-10-12 04:08:01 -0400126 Tick read(PacketPtr pkt) override;
127 Tick write(PacketPtr pkt) override;
Ali Saidi0e805e12004-01-21 20:14:10 -0500128
Ali Saidi9d0aa132004-05-30 17:45:46 -0400129 /**
130 * Post an PIC interrupt to the CPU via the CChip
131 * @param bitvector interrupt to post.
132 */
Ron Dreslinskid41c9042004-01-28 19:18:29 -0500133 void postPIC(uint8_t bitvector);
Ali Saidi9d0aa132004-05-30 17:45:46 -0400134
135 /**
136 * Clear a posted interrupt
137 * @param bitvector interrupt to clear
138 */
Ron Dreslinskid41c9042004-01-28 19:18:29 -0500139 void clearPIC(uint8_t bitvector);
140
Andreas Hansson22c04192015-10-12 04:07:59 -0400141 void serialize(CheckpointOut &cp) const override;
142 void unserialize(CheckpointIn &cp) override;
Ali Saidi02f69b92004-06-10 13:30:58 -0400143
Cagdas Dirik02c376a2015-01-03 17:51:48 -0600144 /**
145 * Start running.
146 */
Andreas Hansson2ac04c12015-10-12 04:08:01 -0400147 void startup() override;
Cagdas Dirik02c376a2015-01-03 17:51:48 -0600148
Ali Saidi0e805e12004-01-21 20:14:10 -0500149};
150
Nathan Binkert92ed0df2005-02-21 17:32:57 -0500151#endif // __DEV_TSUNAMI_IO_HH__