misc: Merge branch 'release-staging-v20.1.0.0' into develop
Change-Id: I8c3277af7903f0b055b26e497139455a03678524
diff --git a/configs/common/MemConfig.py b/configs/common/MemConfig.py
index 941b381..8221f85 100644
--- a/configs/common/MemConfig.py
+++ b/configs/common/MemConfig.py
@@ -227,11 +227,15 @@
mem_ctrl = m5.objects.MemCtrl(min_writes_per_switch = 8,
static_backend_latency = '4ns',
static_frontend_latency = '4ns')
+ elif opt_mem_type == "SimpleMemory":
+ mem_ctrl = m5.objects.SimpleMemory()
else:
mem_ctrl = m5.objects.MemCtrl()
# Hookup the controller to the interface and add to the list
- mem_ctrl.dram = dram_intf
+ if opt_mem_type != "SimpleMemory":
+ mem_ctrl.dram = dram_intf
+
mem_ctrls.append(mem_ctrl)
elif opt_nvm_type and (not opt_mem_type or range_iter % 2 == 0):
diff --git a/src/arch/arm/isa/insts/neon.isa b/src/arch/arm/isa/insts/neon.isa
index c8f8fcd..6290203 100644
--- a/src/arch/arm/isa/insts/neon.isa
+++ b/src/arch/arm/isa/insts/neon.isa
@@ -1452,7 +1452,7 @@
rCount = 2
eWalkCode = simdEnabledCheckCode + '''
RegVect srcReg1, srcReg2;
- BigRegVect destReg = {0};
+ BigRegVect destReg = {};
'''
for reg in range(rCount):
eWalkCode += '''
@@ -1654,7 +1654,7 @@
global header_output, exec_output
eWalkCode = simdEnabledCheckCode + '''
RegVect srcReg1;
- BigRegVect destReg = {0};
+ BigRegVect destReg = {};
'''
for reg in range(2):
eWalkCode += '''
@@ -1884,7 +1884,7 @@
global header_output, exec_output
eWalkCode = simdEnabledCheckCode + '''
RegVect srcRegs;
- BigRegVect destReg = {0};
+ BigRegVect destReg = {};
'''
for reg in range(rCount):
eWalkCode += '''
@@ -2010,7 +2010,7 @@
global header_output, exec_output
eWalkCode = simdEnabledCheckCode + '''
RegVect srcReg1;
- BigRegVect destReg = {0};
+ BigRegVect destReg = {};
'''
for reg in range(2):
eWalkCode += '''
diff --git a/src/arch/arm/isa/insts/neon64.isa b/src/arch/arm/isa/insts/neon64.isa
index 702c128..f049c3e 100644
--- a/src/arch/arm/isa/insts/neon64.isa
+++ b/src/arch/arm/isa/insts/neon64.isa
@@ -351,7 +351,7 @@
global header_output, exec_output
eWalkCode = simd64EnabledCheckCode + '''
RegVect srcReg1;
- BigRegVect destReg = {0};
+ BigRegVect destReg = {};
'''
destReg = 0 if not hi else 2
for reg in range(2):
@@ -632,7 +632,7 @@
global header_output, exec_output
eWalkCode = simd64EnabledCheckCode + '''
RegVect srcRegs;
- BigRegVect destReg = {0};
+ BigRegVect destReg = {};
'''
for reg in range(rCount):
eWalkCode += '''
diff --git a/src/gpu-compute/X86GPUTLB.py b/src/gpu-compute/X86GPUTLB.py
index 45cb962..fee9b9a 100644
--- a/src/gpu-compute/X86GPUTLB.py
+++ b/src/gpu-compute/X86GPUTLB.py
@@ -77,6 +77,6 @@
slave = DeprecatedParam(cpu_side_ports,
'`slave` is now called `cpu_side_ports`')
mem_side_ports = VectorRequestPort("Port on side closer to memory")
- master DeprecatedParam(mem_side_ports,
+ master = DeprecatedParam(mem_side_ports,
'`master` is now called `mem_side_ports`')
disableCoalescing = Param.Bool(False,"Dispable Coalescing")
diff --git a/src/mem/ruby/system/GPUCoalescer.cc b/src/mem/ruby/system/GPUCoalescer.cc
index 03c392f..f5d4f02 100644
--- a/src/mem/ruby/system/GPUCoalescer.cc
+++ b/src/mem/ruby/system/GPUCoalescer.cc
@@ -31,16 +31,11 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/system/GPUCoalescer.hh"
+
#include "base/logging.hh"
#include "base/str.hh"
#include "config/the_isa.hh"
-
-#if THE_ISA == X86_ISA
-#include "arch/x86/insts/microldstop.hh"
-
-#endif // X86_ISA
-#include "mem/ruby/system/GPUCoalescer.hh"
-
#include "cpu/testers/rubytest/RubyTester.hh"
#include "debug/GPUCoalescer.hh"
#include "debug/MemoryAccess.hh"
diff --git a/src/mem/ruby/system/VIPERCoalescer.cc b/src/mem/ruby/system/VIPERCoalescer.cc
index a8a3aa9..82c7f00 100644
--- a/src/mem/ruby/system/VIPERCoalescer.cc
+++ b/src/mem/ruby/system/VIPERCoalescer.cc
@@ -31,16 +31,11 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/system/VIPERCoalescer.hh"
+
#include "base/logging.hh"
#include "base/str.hh"
#include "config/the_isa.hh"
-
-#if THE_ISA == X86_ISA
-#include "arch/x86/insts/microldstop.hh"
-
-#endif // X86_ISA
-#include "mem/ruby/system/VIPERCoalescer.hh"
-
#include "cpu/testers/rubytest/RubyTester.hh"
#include "debug/GPUCoalescer.hh"
#include "debug/MemoryAccess.hh"
