commit e30ef9911f5c80130210e6995b01b1355c4059bd
author seanzw <seanyukigeek@gmail.com> Wed Jun 03 19:59:50 2020 -0700
committer ZHENGRONG WANG <seanzw@g.ucla.edu> Fri Jun 05 22:14:12 2020 +0000
tree a466e7c0848467ca14976b829c2f90fb2b24a18a
parent 332a9de33db603e0aefedae1e05134db4257ea3e

mem-ruby: Fix Prefetcher to RubyPrefetcher in StateMachine.

After renaming Prefetcher to RubyPrefetcher, the slicc generator
should be updated to correctly initialize the prefetcher with
the controller.

Change-Id: Ia12a4640c35aaedd70a4a14e5a10793b060ba924
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29974
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>

src/mem/slicc/symbols/StateMachine.py

diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 8e3a1f8..2e9700f 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -87,7 +87,7 @@
 
             self.symtab.registerSym(param.ident, var)
 
-            if str(param.type_ast.type) == "Prefetcher":
+            if str(param.type_ast.type) == "RubyPrefetcher":
                 self.prefetchers.append(var)
 
         self.states = OrderedDict()