blob: f958e8126c7deba0a70d5bc1eaf03cf66033196a [file] [log] [blame]
# Copyright (c) 2012 ARM Limited
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#
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# property including but not limited to intellectual property relating
# to a hardware implementation of the functionality of the software
# licensed hereunder. You may use the software subject to the license
# terms below provided that you ensure that this notice is replicated
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#
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# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
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# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
from m5.SimObject import *
from m5.params import *
from m5.proxy import *
from m5.objects.BaseCPU import BaseCPU
from m5.objects.KvmVM import KvmVM
class BaseKvmCPU(BaseCPU):
type = "BaseKvmCPU"
cxx_header = "cpu/kvm/base.hh"
cxx_class = "gem5::BaseKvmCPU"
abstract = True
@cxxMethod
def dump(self):
"""Dump the internal state of KVM to standard out."""
pass
@classmethod
def memory_mode(cls):
return "atomic_noncaching"
@classmethod
def require_caches(cls):
return False
@classmethod
def support_take_over(cls):
return True
useCoalescedMMIO = Param.Bool(False, "Use coalesced MMIO (EXPERIMENTAL)")
usePerfOverflow = Param.Bool(
False, "Use perf event overflow counters (EXPERIMENTAL)"
)
alwaysSyncTC = Param.Bool(
False, "Always sync thread contexts on entry/exit"
)
hostFreq = Param.Clock("2GHz", "Host clock frequency")
hostFactor = Param.Float(1.0, "Cycle scale factor")