- 1d4717a mem-cache: Remove mumBlock redundant initialiation from FALRU by Nikos Nikoleris · 7 years ago master
- e5d98f6 mem-cache: Populate the secure bit when the temp block is filled by Nikos Nikoleris · 7 years ago
- 1ecc7a8 mem-cache: Remove unnecessary block initialization on writeback by Nikos Nikoleris · 7 years ago
- d7de6df configs: Fix L3Cache instantiation in lat_mem_rd.py by Nikos Nikoleris · 6 years ago
- 2a71435 mem-cache: Remove extra block init in BaseSetAssoc by Daniel R. Carvalho · 6 years ago
- 3c076e4 mem-cache: Vectorize C arrays in BaseSetAssoc. by Daniel R. Carvalho · 6 years ago
- f4d83ea sim, power: Temperature used for power calculations by Anouk Van Laer · 7 years ago
- ed0f02e sim: Added model type to power model by Anouk Van Laer · 7 years ago
- fbe6307 mem-cache: Fix CacheSet memory leak by Daniel R. Carvalho · 6 years ago
- e83f27e sparc: Fix FS Checkpoint loading by Khalique · 6 years ago
- 38a1e23 arch-arm: Make hlt64 a mem barrier with semihosting by Giacomo Travaglini · 6 years ago
- 73dcf05 arch-arm: Add AArch32 HLT Semihosting interface by Giacomo Travaglini · 6 years ago
- 26b0391 arch-arm: Add AArch32 SVC Semihosting interface by Giacomo Travaglini · 6 years ago
- a7083ec arch-arm: Adding isa templates for semihosting ops by Giacomo Travaglini · 6 years ago
- 657d405 arch-arm: HLT using immediate when checking for semihosting by Giacomo Travaglini · 6 years ago
- 803a8db arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassembly by Giacomo Travaglini · 6 years ago
- a3bb33b cpu-o3: Don't add non-speculative mem barriers to the IQ twice by Andreas Sandberg · 6 years ago
- 68eb852 mem: fix page_table bug for .fast build by Brandon Potter · 6 years ago
- 7352324 arch-riscv: Fix compressed branch op offset by Alec Roelke · 6 years ago
- 72f15d3 arch-arm: Semihosting not available in syscall emulation by Giacomo Travaglini · 6 years ago
- 3b25b7c arch-arm: Add support for secure state in semihosting by Andreas Sandberg · 6 years ago
- 7b96fc2 mem: Refactor port proxies to support secure accesses by Andreas Sandberg · 6 years ago
- 6039da5 arch-arm: Add aarch64 semihosting support by Andreas Sandberg · 6 years ago
- 80427ea arch-arm: IMPLEMENTATION DEFINED register by Giacomo Travaglini · 6 years ago
- 8e17f07 arch-arm: Arch regs and pseudo regs distinction by Giacomo Travaglini · 6 years ago
- 94553f3 arch-arm: Fix syntax error in TLB::getResultTe by Chuan Zhu · 6 years ago
- c105793 arch-arm: Fix big endian support in {Load,Store}Double64 by Chuan Zhu · 7 years ago
- fcc98a5 arch-arm: Fix big endian support in do{Long,L1,L2}Descriptor by Chuan Zhu · 7 years ago
- dec0025 arch-arm: Add support for automatic reset addr selection by Andreas Sandberg · 6 years ago
- 9c97d3f arch-arm: Change ArmFault cast from reinterpret to static by Giacomo Travaglini · 6 years ago
- a30b0e3 arch-arm: Decode Brk64 instructions by Andreas Sandberg · 6 years ago
- b78f216 mem: Add PortProxy read/write helper with explicit endianness by Andreas Sandberg · 6 years ago
- d5231d1 sim: Add gtoh/htog helpers that take an explicit endianness by Chuan Zhu · 7 years ago
- cf58af7 arch-arm: Fix Secure state check in checkFPAdvSIMDTrap64 by Chuan Zhu · 6 years ago
- 8da5e6b mem, sim-se: Fixed seg-fault in EmulationPageTable::remap by Rico Amslinger · 6 years ago
- 4e13495 dev: Remove unused interrupt controller in Terminal by Andreas Sandberg · 6 years ago
- 2d6afc6 sim: Make Stats truly non-copy-constructible by Rekai Gonzalez-Alberquilla · 7 years ago
- e9f7367 Fix DDR4_2400_8x8 DRAMCTRL configuration by Wendy Elsasser · 6 years ago
- 6af3a7d sim: Remove _numContexts member in System class by Giacomo Travaglini · 6 years ago
- 3feeb99 dev: Fix i8042 device errors by Jason Lowe-Power · 6 years ago
- 5a3b9ca mem-cache: Make cache warmup percentage a parameter. by Daniel R. Carvalho · 6 years ago
- 718b53d arch-arm: Correct SecureMonitorTrap vals for aarch32 by Giacomo Travaglini · 6 years ago
- 73b1160 arch-arm: Fixed error in choosing vector offset by Chuan Zhu · 6 years ago
- ad36e61 arch-arm: Don't change PSTATE in Illegal Exception return by Giacomo Travaglini · 6 years ago
- b885dc6 arch-arm: Handle route to EL2 in Supervisor Trap by Chuan Zhu · 6 years ago
- b05a197 arch-arm: Change the type of fault for dc ivac instructions by Nikos Nikoleris · 6 years ago
- 30e9431 arch-arm: Unify permission checks for dc * instructions by Nikos Nikoleris · 6 years ago
- f54e874 arch-arm: Check cache maintenance insts for permission faults by Nikos Nikoleris · 6 years ago
- c364f58 arch-arm: Turn dc ivac to dc civac when some conditions are met by Nikos Nikoleris · 6 years ago
- 4d9811c arch-arm: Fix printing of the data cache maintenance instructions by Nikos Nikoleris · 6 years ago
- 760e2eb arch-arm: Fix cache line size for cache maintenace inst by Nikos Nikoleris · 6 years ago
- f4e27c3 arch-arm: Fault when dc ivac is executed from EL0 by Nikos Nikoleris · 6 years ago
- b72d69c mem-cache: Only pendingModified MSHRs can satisfy CMO snoops by Nikos Nikoleris · 6 years ago
- a1fc8b7 mem-cache: Cleaned blocks should be marked as not writable by Nikos Nikoleris · 6 years ago
- 7798ffb arch-arm: Change function name for banked miscregs by Giacomo Travaglini · 6 years ago
- 633fdd5 arch-arm: Fix AArch32 SETEND Instruction by Giacomo Travaglini · 6 years ago
- 78024e6 arch-arm: Correct Illegal Exception Return detection by Giacomo Travaglini · 6 years ago
- 465705e arch-arm: ELUsingAArch32K from armarm pseudocode by Giacomo Travaglini · 6 years ago
- d7062b1 arch-arm: isSecureBelow from armarm pseudocode by Giacomo Travaglini · 6 years ago
- 234fba5 arch-arm: Fix incorrect assumptions in ELIs64 by Chuan Zhu · 7 years ago
- 0f2e20c mem-cache: Remove extra numSets zero check. by Daniel R. Carvalho · 6 years ago
- ecee328 mem: Standardize mem folder header guards by Daniel R. Carvalho · 6 years ago
- d5b9ffd base: Update #includes for bitunion.hh. by Gabe Black · 6 years ago
- 5f9795a config: remove dead code in fs.py by Nayan Deshmukh · 6 years ago
- 0c208d9 cpu: MinorCPU handling IsSquashAfter flag by Giacomo Travaglini · 6 years ago
- eea11ae arch-arm: Removing Serializing flag from ISB by Giacomo Travaglini · 6 years ago
- 4910d36 base: Fix unused function warning by Nikos Nikoleris · 6 years ago
- 257a678 alpha: fix for no 'break' in the case statement by Sujay Phadke · 6 years ago
- c872143 scons: Resolve backtrace implementation existence testing failure by Hanhwi Jang · 6 years ago
- b919065 arch-x86: consistent style of comments in system files by Christian Menard · 6 years ago
- 3e52d9f arch-x86: Granularity bit and segment limit by Maximilian Stein · 6 years ago
- 89f2871 riscv: Add overrides to various StaticInst methods. by Gabe Black · 6 years ago
- cca6459 base: Remove the ability to cprintf stringstreams directly. by Gabe Black · 6 years ago
- ba7a202 base: Delete commented out versions of the format_integer function. by Gabe Black · 6 years ago
- 9d04c02 arch-arm: understandably initialize register permissions by Curtis Dunham · 6 years ago
- c1513c6 arm: extend MiscReg metadata structures by Curtis Dunham · 6 years ago
- 04251da arch-arm: understandably initialize register mappings by Curtis Dunham · 6 years ago
- 30919a7 config, arm: enable device tree autogeneration for bigLITTLE by Curtis Dunham · 7 years ago
- dcab5b5 config: Embed Device Tree generation in fs.py config by Glenn Bergmans · 8 years ago
- 7c9122b arm: DT autogeneration - generate PCI node by Glenn Bergmans · 8 years ago
- aa80cc9 arm: DT autogeneration - Generate energy controller node by Glenn Bergmans · 8 years ago
- 199ff5e arm: DT autogeneration - autogenerate RealView Platform devices by Glenn Bergmans · 8 years ago
- 1a51f33 arm: DT autogeneration - Generate memory node by Glenn Bergmans · 8 years ago
- 7e9adcc arm: DT autogeneration - Generate cpus node by Glenn Bergmans · 8 years ago
- 7c8662f arm: DT autogeneration - Device Tree generation methods by Glenn Bergmans · 8 years ago
- 3da0578 ext: DT autogeneration - Add PyFtd to m5 space by Glenn Bergmans · 8 years ago
- 9f5b6e1 arm: make Arm GenericTimer a ClockedObject by Curtis Dunham · 7 years ago
- 624a026 base: Add an "override" to name() in the HardBreakpoint class. by Gabe Black · 6 years ago
- 66c3727 base: Get bitunions to compile on clang 3.8. by Gabe Black · 6 years ago
- 3ccef3d util: Implement Lua module for m5ops. by Hanhwi Jang · 6 years ago
- 83f2b25 arch-x86: Adding clflush, clflushopt, clwb instructions by Swapnil Haria · 6 years ago
- b074a15 arch: Remove the "arch/tlb.hh" switching header. by Gabe Black · 6 years ago
- a4e7227 tarch, mem: Abstract the data stored in the SE page tables. by Gabe Black · 6 years ago
- db8c55d x86, mem: Rewrite the multilevel page table class. by Gabe Black · 6 years ago
- 8cb6bb4 util: Implement PIC version of m5ops for X86. by Hanhwi Jang · 6 years ago
- 2e5da92 x86, mem: Don't try to force physical addresses on the system. by Gabe Black · 6 years ago
- fd67869 x86, mem: Get rid of PageTableOps::getBasePtr. by Gabe Black · 6 years ago
- 7036626 x86, mem: Pass the multi level page table layout in as a parameter. by Gabe Black · 6 years ago
- 2a15bfd arch, mem: Make the page table lookup function return a pointer. by Gabe Black · 6 years ago
- b1ade08 base: Hide the BitUnion::__StorageType type. by Gabe Black · 6 years ago