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  1. ee2ffdc docs: Fix power model doxygen by Jason Lowe-Power · 5 days ago master
  2. b11a6d5 mem-cache: Use findBlock in FALRU's block access by Daniel R. Carvalho · 4 days ago
  3. 26f6b94 mem-cache: Use secure flag in FALRU's findBlock by Daniel R. Carvalho · 3 days ago
  4. 1de574f arch-arm: Add ARMv8.1 TTBR1_EL2 register by Giacomo Travaglini · 5 days ago
  5. c21a2a5 arch-arm: Fix Unknown Instruction disassemble by Giacomo Travaglini · 9 days ago
  6. 291c279 arch-arm: Change disassemble when MSR to UNKNOWN register by Giacomo Travaglini · 4 days ago
  7. ce9d9c9 mem-cache: Create NRU Replacement Policy by Daniel R. Carvalho · 6 weeks ago
  8. 8dabce8 arch-arm: Fix masking in CPACR_EL1 by Chuan Zhu · 3 months ago
  9. abbe32b arch-arm: Mask out unsupported trapped exception handling bits by Chuan Zhu · 4 months ago
  10. b299740 arch-arm: Fix FPEXC32_EL2 to FPEXC mapping by Chuan Zhu · 3 months ago
  11. 1c31181 arch-arm: Adding MiscReg Priv (EL1) global flag by Giacomo Travaglini · 4 months ago
  12. fcec1bf arch-arm: Correct masking of cp10 and cp11 in CPACR by Chuan Zhu · 3 months ago
  13. 8a69059 arch-arm: Using explicit invalidation in TLB by Giacomo Travaglini · 4 months ago
  14. 5cebd91 mem-cache: Revamp multiple size tracking for FALRU caches by Nikos Nikoleris · 10 days ago
  15. 2ecc175 dev, arm: Cleanup Pl050 interrupt handling by Andreas Sandberg · 13 days ago
  16. e3dd3c7 gpu-compute: fix bad asserts in gpu tlb and cu tlb port by Tony Gutierrez · 5 days ago
  17. 2a9573f mem-ruby: enable DPRINTFN calls in slicc for temporary debug printing by John Alsop · 6 days ago
  18. c014f4f arch-arm: Fix secure MiscReg access when EL3 is not AArch32 by Giacomo Travaglini · 4 weeks ago
  19. 2c0ce27 ps2: Unify constant names by Andreas Sandberg · 12 days ago
  20. 74e63a6 dev, arm: Use the PS/2 framework in the Pl050 model by Andreas Sandberg · 13 days ago