- 5fa484e misc: Merge the v22.1 release staging into stable by Bobby R. Bruce · 1 year, 4 months ago v22.1.0.0
- 61aabd5 misc: Update RELEASE-NOTES.md for v22.1.0.0 by Bobby R. Bruce · 1 year, 5 months ago
- fcde59b util: ext/systemc is importing env Environment instead of main by Giacomo Travaglini · 1 year, 4 months ago
- 55fb8bf util: Update util-tlm to require C++17 by Giacomo Travaglini · 1 year, 4 months ago
- 25b4def util: Fix missing include of sim/core.hh in util-tlm by Giacomo Travaglini · 1 year, 4 months ago
- 8d117aa util: cxxConfigInit has been removed by gem5 by Giacomo Travaglini · 1 year, 4 months ago
- 9cd61d0 arch-riscv: Correct the IllegalInstFault messege of instruction c.addi4spn by Roger Chang · 1 year, 4 months ago
- 9ce8c9b arch-riscv: Refactor template JumpConstructor by Roger Chang · 1 year, 4 months ago
- 6797c78 arch-riscv: Refactor compressed instructions by Roger Chang · 1 year, 4 months ago
- 5447d55 dev: Fix -Wunused-variable in structured binding by Giacomo Travaglini · 1 year, 4 months ago
- 7fb2fda base: Fix signature of SatCounter::saturate() by Daniel R. Carvalho · 1 year, 4 months ago
- 06f1824 tests: Fix compiler-tests.sh build args passing by Bobby R. Bruce · 1 year, 4 months ago
- 55d8219 tests: Remove get_runtime_isa() from parsec_disk_run.py by Melissa Jost · 1 year, 5 months ago
- 4cae2ae tests: Remove get_runtime_isa() from parsec_disk_run.py by Melissa Jost · 1 year, 5 months ago
- af2cecf gpu-compute: Fix ABI init for DispatchId by Matthew Poremba · 1 year, 4 months ago
- fbd0722 fastmodel,dev: Replace the reset port with a Signal*Port<bool>. by Gabe Black · 1 year, 5 months ago
- 0aaaa6b fastmodel: Change the Signal proxies to use Signal*Port<bool>. by Gabe Black · 1 year, 5 months ago
- 89d5bfc fastmodel,dev: Rework the Int*Pin classes with Signal*Port. by Gabe Black · 1 year, 5 months ago
- 7a21ecf dev: Implement a "Signal" port which has a templated State type. by Gabe Black · 1 year, 5 months ago
- 8b1688d dev: Introduce a reset() method on RegisterBank and Register classes. by Gabe Black · 1 year, 5 months ago
- f96513f sim,sim-se: Fix restoring of VMAs of memory-mapped files by Emin Gadzhiev · 1 year, 5 months ago
- f7d0808 arch-riscv: Fork Zba, Zbb, Zbc, Zbs instructions into rv32 / rv64 by Roger Chang · 1 year, 5 months ago
- 2ed4323 tests: Fix compiler-tests.sh for no build args passed case by Bobby R. Bruce · 1 year, 5 months ago
- ad10711 arch-riscv: Support RV32 to remote gdb by Roger Chang · 1 year, 5 months ago
- dd04e70 arch-riscv: Implement rv32 zicsr extension by Roger Chang · 1 year, 5 months ago
- fa34ebc arch-riscv: Fork ACDFIMU_Zfh instructions into rv32/rv64 by Roger Chang · 1 year, 5 months ago
- d65173d5 tests: Move replacement policy tests to long/Nightly by Bobby R. Bruce · 1 year, 5 months ago
- ce03482 mem: Implement and use the recvMemBackdoorReq func. by Yu-hsin Wang · 1 year, 5 months ago
- 91f8f2b tests: Add missing `_pre_instantiate()` by Bobby R. Bruce · 1 year, 5 months ago
- 81cb7c0 misc: Update .mailmap by Bobby R. Bruce · 1 year, 5 months ago
- 1b2252c misc: Update .mailmap by Bobby R. Bruce · 1 year, 5 months ago
- bd31956 tests: Add replacement policy tests by Jarvis · 1 year, 5 months ago
- e81aa1c configs: Alter x86-npb-benchmarks.py to exit after WORKEND by Bobby R. Bruce · 1 year, 5 months ago
- a23641e configs: Fix x86-gapbs-benchmarks.py example by Bobby R. Bruce · 1 year, 5 months ago
- c765cfb configs: Alter x86-npb-benchmarks.py to exit after WORKEND by Bobby R. Bruce · 1 year, 5 months ago
- 5d47550 configs: Fix x86-gapbs-benchmarks.py example by Bobby R. Bruce · 1 year, 5 months ago
- 00a893a systemc: Enable DMI in the non-blocking/timing mode bridge. by Gabe Black · 1 year, 7 months ago
- 985d9c6 systemc: replace the deprecated std::iterator by Yu-hsin Wang · 1 year, 5 months ago
- 1e73beb python: Remove 'scheduleTickExit' in favor of 'exitSimLoop' by Bobby R. Bruce · 1 year, 5 months ago
- ae20719 python: Remove 'scheduleTickExit' in favor of 'exitSimLoop' by Bobby R. Bruce · 1 year, 5 months ago
- 9d1cc1b dev: Add an offset checking mechanism to RegisterBank. by Gabe Black · 1 year, 5 months ago
- b9c0851 systemc: fix the payload and packet association in Gem5ToTlm bridge by Yu-hsin Wang · 1 year, 5 months ago
- 4fc690f mem-cache: Fix FIFO replacement by Jarvis Jia · 1 year, 5 months ago
- e200ea1 ext: Update ext/sst/README.md for v22.1 release by Bobby R. Bruce · 1 year, 5 months ago
- 620e524 tests: Update presubmit.sh to use v22-1 docker images by Bobby R. Bruce · 1 year, 5 months ago
- a3fd963 util-gem5art: Fix incorrect type of size in `createArtifact` by Bobby R. Bruce · 1 year, 5 months ago
- 1c42262 tests: Update weekly test docker image tags to v22-1 by Bobby R. Bruce · 1 year, 5 months ago
- 38778c5 tests: Abstract the docker image tag for Weekly tests by Bobby R. Bruce · 1 year, 5 months ago
- 1e5bd5b tests: Update nightly test docker image tags to v22-1 by Bobby R. Bruce · 1 year, 5 months ago
- 1c79a46 tests: Abstract the docker image tag for Nightly tests by Bobby R. Bruce · 1 year, 5 months ago
- d1c72ce tests: Update the compiler-tests.sh to use the v22-1 images by Bobby R. Bruce · 1 year, 5 months ago
- ed6d80c util-docker: Add v22-1 tag to docker-compose.yaml by Bobby R. Bruce · 1 year, 5 months ago
- 3df8be9 util-docker: Update gcn-gpu Docker to use v22-1 ROCM patch by Bobby R. Bruce · 1 year, 5 months ago
- 7185c9e stdlib: Update the gem5 resources' version to "v22.1" by Bobby R. Bruce · 1 year, 5 months ago
- da2c70a python,tests: Update Resource URL path to v22-1 by Bobby R. Bruce · 1 year, 5 months ago
- 363d652 base: Update the version to v22.1.0.0 by Bobby R. Bruce · 1 year, 5 months ago
- 7dd61c8 scons: Remove -Werror for the gem5 v22.1 release by Bobby R. Bruce · 1 year, 5 months ago
- 23a406e arch-arm: Setup TC/ISA at construction time 2nd attempt by Giacomo Travaglini · 1 year, 5 months ago
- 596da56 arch-arm: Remove deprecated Armv7 debug Vector Catch by Giacomo Travaglini · 1 year, 5 months ago
- ed6cf2e dev-arm: Allow GICv3 to be externally(publicly) updated by Giacomo Travaglini · 1 year, 6 months ago
- 0df37a3 arch-arm: Setup TC/ISA at construction time 2nd attempt by Giacomo Travaglini · 1 year, 5 months ago
- 749c477 arch-riscv: Add basic features toward rv32 support by Roger Chang · 1 year, 5 months ago
- 6f3f6c1 stdlib, configs: Updating configs/example/gem5_library by Melissa Jost · 1 year, 6 months ago
- 005049f stdlib,python: Allow setting of to tick exits via m5 by Bobby R. Bruce · 1 year, 5 months ago
- da83764 stdlib, configs: Updating configs/example/gem5_library by Melissa Jost · 1 year, 6 months ago
- 8479a69 stdlib,python: Allow setting of to tick exits via m5 by Bobby R. Bruce · 1 year, 5 months ago
- eee4227 dev-amdgpu: Writeback RLC queue MQD when unmapped by Matthew Poremba · 1 year, 5 months ago
- c0d67cb systemc: fix extension not found TlmToGem5 bridge response path by Yu-hsin Wang · 1 year, 5 months ago
- d89d77f fastmodel: correct the Iris namespace for FastModel 11.19 by Yu-hsin Wang · 1 year, 7 months ago
- aeb6178 stdlib: Add MESI Three Level cache hierarchy by Hoa Nguyen · 1 year, 5 months ago
- eac06ad python: Fix multiline quotes in a single line by Hoa Nguyen · 1 year, 5 months ago
- f999470 stdlib: Clean up Ruby cache directory by Hoa Nguyen · 1 year, 6 months ago
- c8949f0 stdlib: Change #virtual_networks of mesi_two_level to 3 by Hoa Nguyen · 1 year, 5 months ago
- 8391f47 stdlib: More helpful message for the filelock error by Hoa Nguyen · 1 year, 5 months ago
- 770b84c sim: Add missing virtual destructor to GlobalSyncEvent by Bobby R. Bruce · 1 year, 5 months ago
- ea3f13f configs: Set CPU vendor to M5 Simulator in apu_se.py by Matthew Poremba · 1 year, 5 months ago
- 92027a6 configs: Set CPU vendor to M5 Simulator in apu_se.py by Matthew Poremba · 1 year, 5 months ago
- ee9e074 tests: Delete build directory before running KVM in nightly by Bobby R. Bruce · 1 year, 5 months ago
- d51ce0d configs: Add missing `_pre_instantiate` call in "run_lupv.py" by Bobby R. Bruce · 1 year, 5 months ago
- 753470e tests: Update riscvmatched tests to use ALL/gem5.opt by Bobby R. Bruce · 1 year, 5 months ago
- 793076f configs,stdlib,tests: Update riscvmatched-fs.py to-init by Bobby R. Bruce · 1 year, 5 months ago
- 373b865 configs,stdlib: Fix import in riscvmatched-fs.py by Bobby R. Bruce · 1 year, 5 months ago
- f34f582 stdlib,configs: Update riscvmatched-fs example docstring by Bobby R. Bruce · 1 year, 5 months ago
- 9696cb5 arch-arm: Revert 'Setup TC/ISA at construction time..' by Bobby R. Bruce · 1 year, 5 months ago
- 98f3d77 arch-x86: X86ISA default vector_string to HygonGenuine by Bobby R. Bruce · 1 year, 6 months ago
- 4054565 tests: Delete build directory before running KVM in nightly by Bobby R. Bruce · 1 year, 5 months ago
- d401b1f base,sim: Adding monitor function to GDB by Quentin Forcioli · 1 year, 8 months ago
- 7230a3e base,sim,ext: Adding GDB signals definition by Quentin Forcioli · 1 year, 8 months ago
- da12e96 configs: Add missing `_pre_instantiate` call in "run_lupv.py" by Bobby R. Bruce · 1 year, 5 months ago
- db35dfb tests: Update riscvmatched tests to use ALL/gem5.opt by Bobby R. Bruce · 1 year, 5 months ago
- 5794643 configs,stdlib,tests: Update riscvmatched-fs.py to-init by Bobby R. Bruce · 1 year, 5 months ago
- 36f2964 configs,stdlib: Fix import in riscvmatched-fs.py by Bobby R. Bruce · 1 year, 5 months ago
- 00c2f09 stdlib,configs: Update riscvmatched-fs example docstring by Bobby R. Bruce · 1 year, 5 months ago
- d7b3020 dev,mem,systemc: Implement and use the recvMemBackdoorReq func. by Gabe Black · 1 year, 7 months ago
- 842a3a9 mem: Add an API for requesting a back door without a Packet/Request. by Gabe Black · 1 year, 7 months ago
- ff16ca3 mem: Add a class to describe a back door request. by Gabe Black · 1 year, 7 months ago
- 5eb7355 fastmodel: CortexR52 export standbywfi signal by Yu-hsin Wang · 1 year, 5 months ago
- ec75787 arch-arm: Revert 'Setup TC/ISA at construction time..' by Bobby R. Bruce · 1 year, 5 months ago
- 33a36d3 dev-amdgpu: Store SDMA queue type, use for ring ID by Matthew Poremba · 1 year, 5 months ago
- 6651329 base: query now works the same way normal command worked by Quentin Forcioli · 1 year, 8 months ago